Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 1998.Includes bibliographical references (p. 178-194).Integrated optoelectronics has shown exciting promise for high speed optical communication systems. For better system performance and lower cost, monolithic optoelectronic integrated circuits (OEICs) are highly desirable. A novel optoelectronic integration technology for high performance OEICs was proposed and partially developed and termed Aligned Pillar Bonding (APB) process. The work began with applying GaAs-based Epitaxy-on-Electronics (EoE) technology to integrate matched pairs of 1.55 micron InGaAs photodetectors with high speed GaAs electronics, which requires the direct growth of InGaAs on lattice-mismatched GaAs substrates using molecular beam epitaxy (MBE). A customized OEIC chip was designed and fabricated. Lattice-mismatched MBE growth was studied and InGaAs photodetectors on GaAs were produced using the relaxed buffer growth. However, the device performance and uniformity deteriorated significantly from those on lattice-matched InP substrates, and thus unsuitable for high speed OEICs. Aligned pillar bonding (APB) process was hence proposed. APB integrates lattice mismatched materials using aligned, selective area wafer bonding at reduced temperature. The photonic device structures are grown on their lattice matched substrates under optimal growth condition. These structures are patterned into pillars, aligned and bonded into the designated wells on the electronic chips. Subsequent substrate removal and device fabrication results in high density OEICs. 1.55 micron InGaAs photodetectors on GaAs were demonstrated using reduced temperature Pd-assisted wafer bonding, resulting in superior device performance. While the conventional dry etching techniques are impractical to pattern the desired deep pillars, electron cyclotron resonance (ECR) enhanced reactive ion etching (RIE) of InP using chlorine/helium chemistry has been developed, resulting in fast, deep, smooth, and highly anisotropic etching at room temperature. The etching characteristics have been calibrated for both InP and GaAs. Fast etching of InGaP, InAlAs, AlAs, and GaP has also been demonstrated. The etched pillars were subsequently bonded onto a OEIC chip, and initial study of small area pillar to well bonding was performed. APB allows independent optimization of both photonics and electronics for OEIC integration, inherits the wealth of the existing electronics industry, maintains good planarization and high density, permits low parasitics and high performance, and is naturally compatible with large scale manufacturing.by Hao Wang.Ph.D
