Design methodology and development of mixed-signal ASICs for space applications in standard CMOS technology

Abstract

Trabajo presentado a la 21st IFIP/IEEE International Conference on Very Large Scale Integration celebrada en Estambul del 7 al 9 de octubre de 2013.-- et al.The design of mixed-signal ASICs for on-board space applications can provide several advantages that would not otherwise be possible with discrete components. However, extreme environmental conditions in terms of radiation and temperature imply a detailed knowledge of the technology used while CMOS commercial foundries do not usually have or make available these data. The aim of this work is to overcome these obstacles and offer solutions for space applications based on mixed-signal ASICs in commercial CMOS technologies. This paper presents the methodology followed for the assessment of a commercial (Austria Microsystems, AMS) 0.35 µm CMOS technology and for the development of a radiation hardened by design (RHBD) digital library. In addition, the described methodology has been applied to the development of two mixed-signal ASICs. The first chip performs the function of an optical digital transceiver for diffused-light intra-satellite optical communications. The second one implements a front-end solution for sensor data acquisition and signal conditioning and consists in a set of configurable multi-mode dual slope ADCs with resolution up to 16 bits.Peer Reviewe