This paper presents some ongoing research carried out in the context of the PRISE Project (Research Platform for Embedded Systems Engineering). This platform has been designed to evaluate and validate new embedded system concepts and techniques through a special hardware and software environment. Since much actual embedded equipment is not available, corresponding behavior is simulated within a high-level architecture (HLA) federation implemented with a run-time infrastructure (RTI) called CERTI and developed at ONERA. HLA is currently largely used in many simulation applications, but the limited performances of the RTIs raise doubts over the feasibility of HLA federations with real-time requirements. This paper addresses the problem of achieving real-time performances with the HLA standard. Several experiments are discussed using well-known aircraft simulators such as Microsoft Flight Simulator, FlightGear, and X-plane connected with the CERTI RTI. The added value of these activities is to demonstrate that according to a set of innovative solutions, HLA architecture is well suited to achieve hard real-time constraints. Finally, a formal model guaranteeing the schedulability of concurrent processes is also proposed
