This dissertation presents a new method of constructing a transformerless, voltage-sourced, medium-voltage multilevel converter using existing discrete power semiconductor devices and printed circuit board technology. While the approach is general, it is particularly well-suited for medium-voltage converters and motor-drives in the 4.16 kV, 500 - 1000 kW range. A novel way of visualizing the power stage topology is developed which allows simplified mechanical layouts while managing the commutation paths. Using so many discrete devices typically drives cost and complexity of the gate-drive system including its control and isolation; a gate-drive circuit is presented to address this problem. As with most multilevel topologies, the dc-link voltages must be balanced during operation. This is accomplished using an auxiliary circuit made up of the same power stage and an associated control algorithm. Experimental results are presented for a 4.16 kV, 746 kW, five-level power converter prototype. This dissertation also analyzes a new capacitor voltage-balancing converter along with a novel capacitor voltage balancing control algorithm. Analysis of the inverter system provides a new description of capacitor voltage stability as a function of system operating conditions
