Techniques for the design of a low noise, high dynamic range, high gain, wideband amplifier for analogue OEIC applications

Abstract

Various techniques for the Design of a Low Noise, High Dynamic Range, High Gain, Wideband Amplifier for Analogue OEIC Applications, such as radar receiver arrays for electronic warfare applications were developed and investigated in this work. Firstly, the available transistor technologies, semiconductor technologies and photodetector technologies and their pros and cons in light of the target application type are investigated in order to decide on the technologies best suited for this research, and justification of the chosen options are presented. Secondly, three different known amplifier topologies are discussed and their linearity, gain, bandwidth, SFDR, and other performances are compared via simulations calibrated against measured results. The results from the comparisons are analysed and the amplifier topology most suitable for this work is chosen based on these results. Thirdly, three different circuit alteration techniques for improving the linearity and SFDR of the previously chosen amplifier topology are developed, analysed and verified through simulations. It is shown that these techniques can be combined to gain further improvement in overall performance. And finally, the influence of various geometrical and doping alterations of the transistor on desired figures of merit, i.e. gain, bandwidth, linearity, etc. are investigated in detail using two-dimensional physical device simulations calibrated against measured results of an InP/InGaAs single heterojunction bipolar transistor. The device simulations were carried out using Technology-Computer-Aided-Design (TCAD) within the SILVACO software package. The results are then used to suggest techniques to improve performance at the transistor level