Farber, Leonard.

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A DIGITAL COMPARATORbyLEONARD PARBERB. S., Kansas State University, I96I4.A MASTER'S REPORTsubmitted in partial fulfillment of therequirements for the degreeMASTER OP SCIENCEDepartment of Electrical EngineeringKANSAS STATE UNIVERSITYManhattan, Kansas1966Approved by:Major Professor "Lb .I ^ (7 TABLE OP CONTENTSFINTRODUCTION ,BIT-BY-BIT PROCESS 2THE LARGER OP TWO BINARY NUMBERS £The Basic Operation £Realization of the Basic Operation 6The Maximum of N Binary Numbers 8Ordering a Set of N Binary Numbers lij.The Minimum of N Binary Numbers 15APPLICATIONS-L6The Median ^Rank Difference Method of Correlation 17The Mode 17Numbers in a Specified Interval 18SUMMARY l8ACKNOWLEDGMENT 20REFERENCES 21INTRODUCTIONThe simplest digital computer system is the one associ-ated with bit-by-bit approximation. The bit-by-bit machine( BBBM ) consists of two elementary operations— addition and de-cision. Having a set, S, and a binary relation, R, for any twoelements of S, a, and b, the decision that is made is whether ais related to b by R. This report will concentrate on develop-ing such a decision device, a digital comparator. The set, S,will be the set of positive binary integers; and three binaryrelations will be considered—greater than, less than, and equalto. The decision to be made will therefore concern the relativesize of two positive binary numbers. Also considered is thenonnumerical problem of ordering a set of numbers ascendinglyor descendingly according as the binary relation greater thanor less than is used, respectively.2THE BIT-BY-BIT PROCESSThe bit-by-bit process consists of successive binary ap-proximations for evaluating exactly or approximately, withinspecified limits of accuracy, the value of a function when apositive finite value is assigned to the independent variable.Basic to this method is the construction of a test function; andfor each approximation the test function is compared with zeroby means of a comparator to determine the next approximation.The bit-by-bit process will be illustrated by calculation oflog2 x.Given a value of x such that 1 < x < 2 and x is of finitelength, consider finding f such that 2f = x. The given intervalfor x implies that.0 < f < 1. Construct the following testfunction, tn ,where fn is the nth bit approximation to f, and define anauxiliary function, an , asa = 22.2n (f-fn )nIn terms of the auxiliary function, the test function becomes*n = an " 2.As a first approximation, choosefn - 1 =and obtain a = x2. If tn < 0, then the approximation is toolarge, and as the next approximation, fn+i, choose fn+1 = fn .3Prom the definition of the auxiliary function, an+1 = (an )2 inthis case. If tn > 0, then the nth bit approximation is toosmall, and as the next approximation select fn+1 = fn+2"^ n+1 ^.For this case, an+1 = (an/2)2.The stop function for the process is an arbitrary givennumber. For example, the process may be terminated when n = 10,or when the difference of fn+1 and fn is smaller than somespecified value. The flow chart illustrating the process isshown in Fig. 1.Suppose a value X > 2 is initially given. Now, an F > 1is sought such that 2P = X. Divide X by 2 repeatedly until Xis transformed into a value x such that 1 < x < 2; that is,X2~ P = x, where 1 < x < 2.Now f may be found such that 2f = x. The inverse of the abovetransformation is now applied to x to obtain F; that is,F = f + P .Similarly, if a value X < 1 is given, transform X by mul-tiplying by 2P until an x is obtained such that 1< x < 2. Thenapply the inverse transformation, 2~ P,to x and get F.In the above bit-by-bit process and in all digital com-puters, an exceptionally important and very elementary operationis the comparison of two numbers. The device which accomplishesthis task shall be singled out, and the remainder of this paperwill be concerned with the investigation, construction, andapplication of such a digital comparator.kFig. 1. A flow chart for the bit-by-bitapproximation of f = log2x.5THE LARGER OP TWO BINARY NUMBERSThe Basic OperationGiven two positive binary numbers, x and y, each b bitslong, one may be subtracted from the other and the larger ofthe two may be found by checking the sign of the remainder. Itwill be shown that the subtraction operation may be replaced bythe simpler addition operation.Definition 1. The degree of a binary number having bbits is b - 1.Definition 2. The ones complement of y is a number y suchthat the ones of y are replaced by zeros and the zeros of y arereplaced by ones.Theorem.Given two positive binary numbers, x and y, eachof degree n, and consider the basic operation x + y. If x > ythen the b + 1 bit, the last carry or overflow bit, will be a 1.If x < y then the last carry bit will be a 0, or equivalentlythere will be no overflow.Proof. 1. Assume x > y and consider x - y. For any posi-tive. binary number, y, of degree n,y + y = 2n+1 - 1or-y = y _ 2n+1 + 1Then, x-y = x + y- 2n+1 + 1 > 0.x + j > 2n+1 - 1x + y > 2n+16Therefore there is always an overflow if x > y.2. Assume x < y. Now,x-y = x + y"- 2n+1 + 1 <x + y < 2n+1 - 1x + y < 2n+13. Finally, if x = y,x-y = x + y- 2n+1 +1=0x + j = 2n+1 - 1x + y < 2n+1Therefore there is no overflow if x < y. End of proof.Therefore to find the larger of x and y, the sum of x andy must be formed and the overflow bit determined.Realization of the Basic OperationUsing parallel addition, if x and y are b bits long, thenb adders are required. The first adder is a half-adder sincethe inputs are Xq and yQ with no previous carry bit. The truthtable for the half-adder is given in Table 1. In Table 1,s =^x + ^ 1,10(3 2 and c ls the cariT Dit - Resulting Booleanexpressions are:s = ¥o + Woco = xoyoThe remaining b - 1 adders are full-adders since each will havethe three inputs x± , j± , and o^, where is the previousTable 1. Truth table for the half-adder,*0 yo so ccarry bit. The full-adder truth table is given in Table 2,Table 2. Truth table for the full-adder.; i-l1 11 11 1 11 11 1 11 1 11 1 1 1 1The full-adder's Boolean expressions are:s i = ¥i c i-i + Vi^i-i + v±°t-i + xiyi<>i-ic i = yi ci-i + H c i-i + ¥i8Physical realization of these Boolean expressions are shown inPig. 2.In the circuit of Pig. 2, it would be just as feasible touse direct subtraction in finding the larger of x and y. How-ever, using the basic operation, the sum itself is of no impor-tance. Only the overflow bit contains the information of inter-est. Therefore the previous circuit components may be reducedby constructing each adder modulo its summer, that is, construct-ing only the "carry bit generator" (CBG). The resulting circuitis shown in Pig. 3. With the overflow bit now available, itremains only to determine whether it is a 1 or a 0.The above process has destroyed both x and y. The largerof the two is not available as an input if it should be desiredto compare it with a third positive binary number, z. In thenext section, reconstruction of the larger number will beundertaken.The Maximum of N Binary NumbersGiven a set of positive binary numbers, (x-^, x2 , x^, . . .,x^,the maximum of the set may be found by finding the largerof x-^ and x2 , then the larger of this and x^, and continuing inthis fashion until all the numbers in the set have been ex-hausted. It was seen earlier though that in finding the largerof x-l and x2 both were destroyed. Therefore the larger of thetwo much be reconstructed so that it is available as an inputto be compared with x^, and likewise for each successive maximum.91011A circuit to accomplish this task is shown in Fig. i}..Represented is a single bit section.Here x^. and xik are the itn bits of the j tn and ktnnumbers in the set. As x^j and are put into the i tn carrybit generator, each is also put into an RS flipflop containinga trigger input. A positive pulse will be used for a 1 signal,and a negative pulse for a signal. The operation table ofan RS flipflop is shown in Table 3. The present state is denotedTable 3. Operation table of an RS flipflop.by q and the next state by Q. Operation of the trigger terminalis such that if a negative pulse, a zero signal, is applied toit, the present state is complemented.It is desired that the output state of the flipflop corre-spond to the set input s. Looking at conditions 3 and 5 of theoperation table, it is seen that if the present state is andif the reset input is the complement of the set input, then thenext state or output will be the same as the set input.124>1fD2To the i th CBGST RFF,jl si1D2R T SPPognal 1 signal•Al.m ii th bit ofthe maximum Stop afterN - 1 cyclesPig. 1^.. A circuit to reconstruct the i th bitof the larger. of x. and x^.13The input bit, Xj_, will be applied to the set terminal andits complement to the reset terminal as shown in the circuit dia-gram. The delay, B1 , is introduced to allow time for the inver-sion of xi so that x,- and x n- arrive at their respectivexn xn 1nterminals simultaneously.The operation table of the flipflop shows that in condition.5 when xin is a 0, the next state is a 0. However, this is thedesired state at the time the input x^ is applied. Thereforeno difficulty is encountered concerning the present state uponapplying the input which follows x-s . In condition 3 where x n-^-n inis a 1, the next state is a 1. Thus in this case the state mustbe complemented before the next input is applied. If xn- is axn1, then the signal at the reset terminal is a and if this isapplied to the trigger terminal, the flipflop is put in thestate. If xin is a 0, then the reset signal is not desired atthe trigger input. Therefore the reset signal is first appliedto a diode connected to admit a negative pulse and then appliedto the trigger terminal. The delay, D2 , is introduced so thatthe state is not changed before it is known whether x* is tobe reconstructed; that is, not before the signal from the lastcarry bit generator arrives.To determine whether cb is a 1 or a 0, cb is brought to ajunction of two diodes as shown in Pig. 1+. The left diode, dj,admits a positive pulse and the right diode, d2 , admits a nega-tive pulse. If cb is a 1, then d 2 does not conduct, and the 1signal at d-j^ along with the output of FFlt x^, are put into anAND gate, A 1 . The output of the AND gate, A-^ Xij- is desired14since cb = 1 implies Xj > xk . Now xij. is fed back and replacesxik in FF2 for tiie next comparison. In FF-^ x^. is replaced bythe i th bit of the next number in the set, xix . In case c fe isa 0, diode d-j_ does not conduct and the signal at d2 is in-verted. The resulting 1 signal along with the output of FF2 ,xik , are put into an AND gate, A 2 . The output of this AND gateis xik which is now desired since cb = implies xk > Xj. Herexik is fed back and used again in FP2 for the next comparison.As before, x^j in FF1 is replaced by xijt .The STOP function in the feedback path may be set at N - 1cycles for N numbers in the set. Then the i th bit of the maxi-mum is brought to a register cell, m^. If the circuit of Fig. Ij.is paralleled, one for each bit, the maximum of the set of num-bers appears in register M.Ordering a Set of N Binary NumbersThe maximum of the set of numbers has been found previouslyand has been placed in a register, M^. The process may now berepeated using the remaining subset of N - 1 numbers. The maxi-mum of this subset is placed in a register, M2 . Continuing inthis fashion, and placing the last number in register MN , thenumbers in the set appear in registers M-^, M2 , . . . , MN in de-scending order. In obtaining the first maximum, N - 1 compari-sons were necessary. To find the second maximum, N - 2 compar-isons were needed. Therefore the total number of comparisons,T, necessary to order the set of N numbers is given by15T = (N - 1) + (N - 2) + (N - 3) + . . . + 1.Since this is just the sura of the first N - 1 positive integers,N(N - 1)T = .2If the set is thus ordered and register MN is considered, thenthe minimum of the set is available. The case in which theminimum is desired rather than the maximum will be discussednext.The Minimum of N Binary NumbersGiven two positive binary numbers, Xj and xk , and consider-ing the basic operation, Xj + xk , it was shown that if the lastcarry bit, cb , is a 1, then Xj > xk ; and if cb is a 0, thenxj < xk* In finding the larger of x. and xk , the circuit ofPig. I± was used to reconstruct the i th bit of Xj if cb is a 1or the i th bit xk if cb is a 0. It is desired to use the cir-cuit of Fig. ij. to reconstruct the ith bit of the smaller of Xjand xk . If cb is a 1 or a 0, the ith bit of xk or Xj, re-spectively, is to be reconstructed.In order to accomplish the abpve task, only a single addi-tion to the circuit is necessary; that is, a reversing switchneed be placed in the lines at points P 2 . With the switchin one direction, the circuit is unchanged from that shown inPig. k' If the switch is in the other direction, then diode,d]_, is connected to AND gate, A 2 ; and diode, d 2 , is connectedto AND gate, A-,.16In this case, if cb is a 1, the 1 signal at d1 is broughtto AND gate, A 2 , along with the output of FF2 , xik . The outputof A 2 , xik , is desired since cb 1 implies xk < Xy As beforexik is fed back and used again in PP 2 for the next comparison;and xij. is replaced by the next input, xix . If cb = 0, thesignal at d 2 is inverted, but now the resulting 1 signal isbrought to AND gate, A-^ along with the output of PP1 , x± ..The output of A-j_ is as desired since cb = implies x. < xkAgain, x±.replaces xlk in PP2 . The minimum of the set of num-bers will now appear in register M. The set may be ordered inthe same manner discussed earlier, but now the numbers appearin registers M-^, M2 , . . . , MN in ascending order. The samenumber of comparisons is needed in both cases.APPLICATIONSThe MedianGiven a set SQ = ^x-L , x2 , . . ., x^where the xi are posi-tive binary numbers and N is odd, the median of the set may befound by repeated use of the basic operation. The maximum ofthe set is found by the method described earlier. Similarly,the minimum element of S Q is found. Now, both the maximum andthe minimum are removed from the set. The remaining subset,sb> is sb = s a ~ Cxa max* xa min~) • Tne maximum and minimumof Sb are likewise found and removed. This leaves the subsetSc= Sb " { xb max' xb min ") • By successively removing the17maximum and minimum from the remaining subsets, a subset isultimately obtained for which xM rnflX = ^ min . This value ofx is the median of the original set, S. The subset may con-tain more than one element, but in that case the elements willall be identical.Rank Difference Method of CorrelationGiven N corresponding pairs of measured items (xi , yi ),i = 1, 2, . . . , N. Let the corresponding rank numbers be(Pi» qj_) where p i =? 1 for the largest x± , pi = 2 for the nextlargest x± , and so on. Similarly, qi = 1 for the largest y^,q1 = 2 for the next largest y i , etc. The rank difference co-efficient of correlation is given byp . ,.*I<Pi - «i>2N(N2 - 1)If the pairs (x^ yi ) are considered as two sets of numbers,X = {xi) and Y = > each set may be ordered descendingly byusing a digital comparator. Having the sets ordered, it is nowvery easy to determine the corresponding rank numbers to be usedin the expression for the coefficient of correlation.The ModeGiven a set of N binary numbers, (j^, x? , . . ., x^ , aweighting factor, f±> 0, is associated with each x. . The18weighting factor may be the frequency, reliability, or someother indicator. The mode of the set is defined as that value,xi , with which the maximum weighting factor, f,, is associated.Therefore the comparator may be used to find the maximum of theset, f^,and then the corresponding is the mode.Numbers in a Specified IntervalGiven a set of positive binary numbers, (x-^ x2 , . . ., xN^the xi which are sought are those which are in the open in-terval between «< and p. First, each number in the set is com-pared with and those which are greater than ^ are stored ina register, M. After the elements of the set have been ex-hausted, those xi > * are successively removed from the registerand compared with (3. Now those x^ for which p > are returnedto register, M. When these comparisons are completed, the xiin the register are such that «< < xi < p.SUMMARYThis report primarily contains a development of a digitalcomparator which in conjunction with the often discussed adderresults in the integrated bit-by-bit machine.A basic operation was defined, and it was shown that theoperation yields a signal which always indicates which of twopositive binary numbers is the larger; a realization of the19operation is given. A physical realization is then developedfor finding the maximum or minimum of a set of binary numbersand is subsequently used in ordering the set. Several appli-cations for the digital comparator are briefly discussed.ACKNOWLEDGMENTThe writer wishes to express his appreciation to hismajor professor, Dr. Charles A. Halijak, for his guidanceand helpful assistance throughout the preparation of thisreport.21REFERENCES1. Combet, M. , H. Van Zonneveld, and L. Verbeek.Computation of the base two logarithm of binary numbers.IEEE Transactions on Electronic Computation, Vol. EC-ll^.,No. 6, December, 1965.2. Morrison, D. R.A method for computing certain inverse functions.Mathematical Tables and Aids to Computation, Vol. 10,No. 56, p. 201)., 1956.3. Mott, H. , and C. C. Caroll.A versatile comparator for encoding devices. IEEE Trans-actions on Electronic Computers, Vol. EC-llj., No. 3,June, 1965.1±. Phister, Montgomery, Jr.Logical design of digital computers. New York: JohnWiley and Sons, Inc., 1958-5. Wensley, J. H.A class of non-analytical iterative processes. BritishComputer Journal, Vol. 1, No. I+, 1959.6. Wilkes, N. V., D. J. Wheeler, and S. Gill.The preparation of programs for an electronic digitalcomputer. Cambridge, Mass. : Addison-Wesley Press,1951.A DIGITAL COMPARATORbyLEONARD PARBERB. S., Kansas State University, I96J4.AN ABSTRACT OF A MASTER'S REPORTsubmitted in partial fulfillment of therequirements for the degreeMASTER OP SCIENCEDepartment of Electrical EngineeringKANSAS STATE UNIVERSITYManhattan, Kansas1966The simplest digital computer system is the one associatedwith bit-by-bit approximation. The bit-by-bit machine consistsof the two elementary operations of addition and decision.Having a set, S, and a binary relation, R, for two elements ofS, a and b, the decision that is made is whether a is relatedto b by R.This report primarily contains a development of a decisiondevice, a digital comparator, which in conjunction with theoften discussed adder results in the integrated bit-by-bitmachine. The set, S, is the set of positive binary integers;and three binary relations—greater than, less than, and equalto are considered. The decision that is made therefore con-cerns the relative size of two positive binary numbers.A basic operation, x + y, is defined; and it is shown thatif the last carry bit, cb , is a 1, then x > y, and if c fe is athen x< y. A realization of the operation is given. A physicalrealization is developed for finding the maximum or minimum ofa set of binary numbers and is subsequently used in orderingthe set ascendingly or descendingly according as the binaryrelation greater than or less than is used, respectively.Several applications for the digital comparator are brieflydiscussed.

A digital comparator

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A digital comparator

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