French, M

Hall, G

Milmore, M

Raymond, M

Sciacca, G F

CERN Document Server

OPEN-99-19801/01/96Measurements of radiation hardened transistors from Harris and DMILLtechnologiesM. Millmorea*, M. Frenchb, G. Halla, M. Raymonda, G. F. SciaccaaaImperial College, London, SW7 2BZ, UKbRutherford Appleton Laboratory, Didcot, Chilton, Oxon., OX11 0QX, UK* Corresponding author. E-mail: m.millmore@ic.ac.ukAbstractAll experiments at the LHC will require front end electronics capable of reading small signals at high speed fromsilicon microstrips and other types of detector, in a harsh radiation environment. The electronics adopted by the CMScollaboration for the microstrip tracking system is based on the APV CMOS front end readout chip. One possibleradiation hardened technology under consideration for this chip is the Harris 1.2 m m AVLSIRA bulk CMOS process.Results are presented of measurements of transistors from this process from several processing runs, monitoring thestability of the process and testing its radiation hardness and suitability. Measurements have also been made to verifythe radiation hardness of other structures in the process, in particular resistors and capacitors.1. INTRODUCTIONIt is well known that experiments at the LHC will besubject to high radiation doses. For the CMS detector,simulations show radiation levels in the inner trackingregions of 10 Mrads of ionizing radiation and 101 4hadrons/cm2 over the 10 year lifetime of the experiment[1,2]. Standard microelectronics processes are incapableof withstanding these doses, therefore radiation hardenedprocesses must be used. The two main processes that havebeen made available to the European high energy physicscommunity are the Harris 1.2 m m AVLSIRA bulk CMOSprocess [3] and the DMILL mixed technology processwhich includes CMOS, NPN and JFET structures[4].Test structures have been constructed in three processingruns of the Harris process and one in DMILL, eachconsisting of CMOS transistors suitable for use as inputtransistors for a preamplifier-shaper circuit for front endreadout of silicon microstrip detectors or MSGC’s. Alldevices have been measured before and after gammairradiation to at least 10 Mrads. The most recent Harrisrun also included test resistors and capacitors, and deviceshave been irradiated up to 100 Mrads.At the outset of these studies, very little was known aboutthe analogue performance of radiation hardened CMOStransistors, in particular of the AVLSIRA process whichwas originally developed for digital applications.Investigations concentrated on PMOS devices since inradiation hardened processes they have lower noise andgreater radiation hardness. Measurements were made ofthe behaviour of transconductance, threshold voltage andnoise spectral density after irradiation.A complete prototype radiation hardened front-endreadout chip for use with silicon microstrips was theAPV5, designed in the Harris process. It has previouslybeen tested in the lab [5] and in a beam [6] and now hasbeen tested after irradiation to 16 Mrads.2. TRANSISTOR IRRADIATIONSThe devices have been irradiated, whilst biased with500 m A drain current, in a 60Co source. Betweenirradiations the devices remained unbiased, giving similarconditions to LHC where the detector system will beunpowered for half of the year. Due to externalcircumstances the available dose rate from the 60Cosource changed over a period of time, from between 300krad/hr for the first Harris transistors to 50 krad/hr for theDMILL transistors. The transistors received doses of 250krad, 1 Mrad, 5 Mrad and 10 Mrad for all except thesecond Harris processing run which received 15 Mradonly. Devices from the third Harris processing run wereirradiated further to 20 Mrad, 50 Mrad and 100 Mrad.The time between irradiation varied by several days,allowing variable amounts of annealing to take place.These results do not therefore represent an exactcomparison between transistors but are an indicator of theability of the devices to withstand irradiation in an LHCenvironment. At present it is not clear that othermeasurement protocols developed for military or spaceapplications are applicable to the LHC conditions e.g. interms of temperature range, LHC operating cycles andannealing conditions.3. TRANSISTOR MEASUREMENTSMeasurements have been made of transconductance,threshold voltage and noise spectral density of thetransistors using equipment described in [7,8].Up to eighteen transistors of varying size were measuredfrom three die from each processing run. Results areshown of a typical example of the shortest device, of size2000 · 1.4 m m for the Harris PMOS transistors and 2000·  1.2 m m for DMILL and Harris NMOS transistors.3.1 Transconductance MeasurementsThe data from the transconductance measurements areplotted as current scaled transconductance against currentdensity (gm/ID vs ID /W) as described in [7] to removewidth dependence from the plots, thus allowingcomparison between devices of different dimensions. Nocorrections for length dependence was made since thedevices were constructed with minimum length, giving auncertainty of up to 50% in the effective length.3.1.1 Pre-irradiation measurements35302520151050g m /I D(V-1 )0.001 0.01 0.1 1 10ID/W (Am-1) 1st Harris run 2nd Harris run 3rd Harris run DMILLPMOS transistorspre irradiation, VB = 2 VFig. 1. PMOS scaled transconductance prior toirradiation. Line shows ID = 500 m A.Plots of gm/ID against ID/W for the transistors, prior toirradiation are shown in figs. 1 and 2. The dotted lineindicates 500 m A, the current of interest for thepreamplifier-shaper of the APV5. All Harris transistorshad similar transconductance at this current, indicatingthe stability of the process. The DMILL transistors hadvery similar properties to the Harris transistors.35302520151050g m /I D(V-1 )0.001 0.01 0.1 1 10ID/W (Am-1) 1st Harris run 2nd Harris run 3rd Harris run DMILLNMOS transistorspre irradiation, VB = -2 VFig. 2. NMOS scaled transconductance prior toirradiation. Line shows ID = 500 m A.3.1.2 Post irradiation measurementsFig. 3 shows the scaled transconductance of the PMOStransistors after irradiation changing by less than 1% inthe Harris process and up to 15% after 10 Mrads in theDMILL process .3020100g m /I D(V-1 )10-3 10-2 10-1 100ID/W (Am-1)302010010-3 10-2 10-1 1001st Harris run 0 Mrad 250 krad 1 Mrad 5 Mrads 10 Mrads2nd Harris run3rd Harris run DMILL20 Mrad50 Mrad100MradFig.3 Scaled transconductance of PMOS transistors afterirradiation (VB = 2V).Fig. 4 shows that the NMOS devices transconductancereduced very little after irradiation at ID = 500 m A, but bylarger amounts in the weak inversion region. Whilst thechanges appear to be greatest in the third processing run,this saturated after 20 Mrads with transconductance stillabove that of the other two processing runs.3020100g m /I D(V-1 )10-3 10-2 10-1 100ID/W (Am-1)302010010-3 10-2 10-1 1001st Harris run 0 Mrad 250 krad 1 Mrad 5 Mrads 10 Mrads2nd Harris run3rd Harris run DMILL20 Mrad50 Mrad100MradFig. 4. Scaled transconductance of NMOS transistorsafter irradiation (VB = -2V).3.2 Threshold Voltage Shifts1086420Irradiation dose (Mrad)100 mV / division  PMOS NMOS1st Harris run3rd Harris runDMILLFig. 5. Threshold voltage shifts (VB = – 2 V)The threshold voltages of the transistors were calculatedfrom the data which were used to calculate thetransconductance. Fig. 5 shows the threshold voltageshifts of the transistors after irradiation up to 10 Mrads.The threshold voltage shifts of all of the devices is within300 mV. Further irradiation up to 100 Mrad for the thirdHarris processing run showed little further change.The threshold voltage shifts of the Harris transistors werefound to be independent of dimension, whereas the shiftsof the DMILL transistors were dimension dependent [7]with smaller devices (500 · 3.2 m m) having less than100 mV shift. It is also interesting that the DMILLNMOS transistors have a positive threshold voltage shift,showing the influence of the interface trapped chargewhich normally only becomes dominant after annealing.3.3 Noise MeasurementsThe noise spectral density of the devices has beenmeasured with a drain current of 500 m A, except for thedevices from the first Harris processing run which weremeasured at ID = 300 m A [7]. The important frequency is3 MHz which corresponds to the central frequency of a50 ns CR-RC pulse, the typical shaping time of thepreamplifier-shaper circuits being designed for LHC innertracking detectors.3.3.1 Pre irradiation measurements1234561023e n (nV/ÖHz)104105106107Frequency (Hz) 1st Harris run 2nd Harris run 3rd Harris run DMILLPMOS 2000 ·  1.4 m m, pre irradiationFig. 6. Noise spectral density of PMOS transistors.ID = 500 m A (300 m A for first processing run).Figs. 6 and 7. show that the noise spectral density prior toirradiation of the Harris transistors although consistentbetween devices from the same batch, has improved ineach subsequent processing run. This is believed to bedue to improved quality control in the foundry during thethree year period over which the fabrications took place,leading to a reduction in the 1/f noise. The noise in the3 MHz region of the DMILL transistors and the latestHarris transistors is comparable. The noise of the NMOStransistors is larger than that of the PMOS ones.1234561023e n (nV/ÖHz)104105106107Frequency (Hz)NMOS 2000 ·  1.2 m m, pre irradiation 1st Harris run 2nd Harris run 3rd Harris run DMILLFig. 7. Noise spectral density of NMOS transistors.ID = 500 m A (300 m A for first processing run).3.3.2 Post irradiation measurementsFigs. 8 and 9 shows the noise spectral density of the 2000·  1.4 m m transistors after irradiation. The noise of theHarris PMOS transistors increased by 5-10% after10 Mrad, with only a slight further increase in 1/f noiseafter 100 Mrad. A larger increase was evident in theDMILL PMOS transistors.1246102e n (nV/ÖHz)107106105104Frequency (Hz)1071061051041246102  0 Mrad 250 krad 1 Mrad 5 Mrad 10 Mrad 20 Mrad 50 Mrad 100 Mrad1st Harris run 2nd Harris run3rd Harris run DMILLFig. 8. Noise spectral density of PMOS transistors afterirradiation. ID = 500m A (300m A for first processing run).Fig. 9 shows an increase of up to 30% in the noisespectral density of the NMOS Harris transistors after5 Mrads, with little further increase up to 100 Mrads.Again the increase in the noise of the DMILL transistorswas larger and showed no sign of saturating after10 Mrads.1246102e n (nV/ÖHz)107106105104Frequency (Hz)1071061051041246102 0 Mrad 250 krad 1 Mrad 5 Mrad 10 Mrad 20 Mrad 50 Mrad 100 Mrad1st Harris run 2nd Harris run3rd Harris run DMILLFig. 9. Noise spectral density of NMOS transistors afterirradiation. ID = 500m A (300m A for first processing run).4. PASSIVE COMPONENTSFive resistive test structures were included on the thirdHarris processing run. This included Metal 1, Metal 2 andPolysilicon resistors and Polysilicon / Metal 1 andMetal 1 / Metal 2 via chains of 960 contacts to verifyperformance. Fig. 10. shows that the structures areunaffected by irradiation.25x103 2015105Resistance (W)100806040200Irradiation Level (Mrad)200150100500Poly 1 ResistorMetal 1 / Metal 2via chainMetal 1 ResistorPoly 1 / Metal 1via chainMetal 2 resistorFig. 10. Resistive structures after irradiation.Two capacitor arrays, one of 20 1 pF capacitors and oneof 500 42.7 fF capacitors were measured at 100 kHz.Negligible changes were seen in their measured valuesafter irradiation.5. APV5 IRRADIATIONSThe APV5 front-end readout chip has been irradiated upto a total dose of 16 Mrad. During irradiation, it wassupplied with the nominal biases and clock and triggersignals to fully exercise the chip.100500ADC unitstime [25 nsec./division] 0 Mrad 250 krad 1 Mrad 4 Mrad 16 Mrad Ideal CR-RC pulse shape Tuned pulse shape after 16 MradPulse shape of one channel of the APV5before and after irraadiationFig. 11. APV5 pulse shape changes with irradiation.The pulse shape of the preamplifier-shaper circuit wasrecorded at nominal bias after irradiation (fig. 11). Nodirect analogue output existed on the chip therefore thepulse shape was measured in many steps by altering thetrigger time with respect to the charge injection time.Since the correct operation of the digital circuitry wasrequired for this, it is evident that it was unaffected byirradiation. The pulse height at nominal bias reduced withirradiation due to the reduction in transconductance of anNMOS transistor in a key position in the circuit, whichhas been replaced with a PMOS transistor for the nextchip, the APV6. Nevertheless after irradiation, byadjusting biases it was possible to achieve the idealCR-RC pulse shape which is necessary for deconvolution.Within the limits of simple measurements, no increase inequivalent noise charge was evident after irradiation. Thechip power consumption after irradiation was identical tothe pre-irradiated value from a comparison between twodifferent chips.7. CONCLUSIONSHarris and DMILL transistors have been tested to100 Mrads and 10 Mrads respectively. They have beenshown to have similar properties and to operate well afterthese doses, with less change seen in the PMOStransistors than the NMOS ones. Resistors and capacitorsin the Harris process are also stable to 100 Mrads.The APV5 has been irradiated to 16 Mrads. The analoguepulse height reduced with constant bias conditions, butmodifications have been made on future chips to removethis effect. The correct pulse shape is always achievableby adjustment of biases. The digital circuitry was notaffected by irradiation.ACKNOWLEDGEMENTSWe thank both Harris and DMILL for their co-operationand help in this work. Thanks are also due to Peter Clayfor the use of the 60Co source.REFERENCES[1]M. Huhtinen. Radiation Environment Simulations forthe CMS Detector. CERN CMS TN/95-198.[2] CMS Technical proposal. CERN/LHCC 94-38(December 1994)[3] N. Van Vonno. Paper presented at this conference.[4] T. Corbière. Paper presented at this conference.[5] M. French et. al. Proc. first Workshop on Electronicsfor LHC experiments, CERN/LHCC/95/56 (1995) p. 120.[6] MDM de Fez-Laso et. al. Beam test performance ofthe APV5 chip. To be published in NIM.[7] Studies of Radiation Hardened Electronics for use inInner Tracking Systems at the Large Hadron Collider. M.Millmore. RAL-TH-96-009.[8] Measurements of transistors and silicon microstripdetector readout circuits in the Harris AVLSIRA rad-hardCMOS process. M. Raymond, G. Hall, M. Millmore et.al. Nucl. Instr. and Meth. A351 (1994) 449-459.

Measurements of radiation hardened transistors from Harris and DMILL technologies

Abstract

Similar works

Full text

Available Versions

CERN Document Server