We propose the installation of a data taking system at a test beam for the simultaneous test of LHC detectors, trigger and readout electronics, together with the development of the supporting architecture in a multiprocessor environment. A strong emphasis is put on a highly modular design, such that new hardware and software developments can be conveniently introduced for training and evaluation. One of the main thrusts of the project will be the modelling and system integration of different readout architectures, which are meant to provide a valuable training ground for new techniques. To address these aspects in a realistic manner, we propose to collaborate with two detector R+D projects
