Performance Evaluation of a Starlite-like Architecture for ATM Switching

Abstract

A Starlite-like switching architecture for ATM applications is examined in this paper. The switching architecture consists primarily of a Batcher sorting network and a Banyan switching network. A performance evaluation is done using both analysis and simulation. A discrete time queueing analysis is utilized due to the slotted nature of the system. Cells that are unable to make it through the system due to contention for resources are queued in a central buffer. There is one queue for each output line. The queues are implemented using a First In First Out (FIFO) queueing discipline. Only one packet from each queue is recirculated back to the system during each time slot. The average number of visits that a packet makes to the buffer and the mean queue length at various input utilizations are analyzed and compared to simulation values