Memory-demanding Periodic Real-Time Applications on FPGA Computers

Abstract

This paper presents work in progress on executing realtime applications on FPGA-based computing systems. Usually, these systems provide an FPGA device coupled with multiple external SRAM banks. Todays FPGAs show large capacities and are reprogrammable during runtime, allowing for space- and time-sharing multitasking. Typical FPGA tasks demand large memory buffers and access them periodically. In our previous work, we have devised techniques for scheduling periodic real-time tasks to such systems. In this paper, we address the resulting problem of assigning data buffers to physical memories, and aim at minimizing the number of required memories for a given application. We model the minimization problem as an integer linear program and present first results