ILP Models for Simultaneous Energy and Transient Power Minimization during Behavioral Synthesis

Abstract

this paper, we propose an ILP-based framework for the reduction of energy and transient power through datapath scheduling during behavioral synthesis. A new metric called "modified cycle power function" (CPF ) is defined that captures the above power characteristics and facilitates integer linear programming formulations. The ILP-based datapath scheduling schemes with CPF as objective function are developed assuming three modes of datapath operation, such as, single supply voltage and single frequency (SVSF), multiple supply voltages and dynamic frequency clocking (MVDFC), and multiple supply voltages and multicycling (MVMC). We conducted experiments on selected high-level synthesis benchmark circuits for various resource constraints and estimated power, energy and energy delay product for each of them. Experimental results show that significant reductions in power, energy and energy delay product can be obtained. Categories and Subject Descriptors: B.5.1 [Register-Transfer-Level Implementation]: Datapath Design; B.5.2 [Register-Transfer-Level Implementation]: Automatic Synthesis, Optimization; G.1.6 [Numerical Analysis]: Optimization, Integer Programming General Terms: Algorithms, Performance, Design, Reliability, Linear Modeling of Non-linearity, Scheduling Additional Key Words and Phrases: peak power, cycle difference power, peak power differential, average power, multiple supply voltages, dynamic frequency clocking, multicycling, datapath scheduling 1