A Programming Environment for the Design of Complex High Speed ASICs

Abstract

A C++ based programming environment for the design of complex high speed ASICs is presented. The design of a 75 Kgate DECT transceiver is used as a driver example. Compact descriptions, combined with efficient simulation and synthesis strategies are essential for the design of such a complex system. It is shown how a C++ programming approach outperforms traditional HDL-based methods. 1 Introduction In this contribution, we present a programming environment based on C++ that supports simulation, verification and synthesis of complex high speed ASICs for digital telecommunications. It is part of a larger environment that targets an automated synthesis path from the Matlab algorithm level to the VHDL architecture level [8]. In order to introduce the requirements put on to such an environment, a recent design experience will be documented. The design consists of a digital radiolink transceiver ASIC, residing in a DECT base station (figure 1). The chip processes DECT burst signals, receiv..