Modelling Architectures for VLSI Implementations of Fuzzy Logic Systems

Abstract

Introduction A simple model for predicting the silicon area occupied by a fuzzy logic system when implemented as VLSI integrated circuits is presented. The approach considers only a zeroorder Sugeno fuzzy model [Sugeno88]. The model enables the early identification of corelimited or interconnect-limited architectures for a given technology, utilizing design rule considerations, and gives the designer the opportunity of evaluating competing architectures for realistic, practical implementations. 2. Fuzzy reasoning Fuzzy inference systems have been successfully applied in a diverse range of areas. As a result of this multi-disciplinary approach there has evolved a range of different approaches and nomenclatures [Jang95, Lee90]. The interpretation of fuzzy reasoning used in this work is commonly referred to as a zero-order Sugeno fuzzy model [Sugeno88, Takagi85]. In this model the consequent of each fuzzy IF THEN rule is represented by a fuzzy s