Program Slicing on VHDL Descriptions and Its Applications

Abstract

We propose applying program slicing to hardware description language VHDL; program slicing is a technique developed in the software engineering field, and it can extract all the sentences which have a certain dependence to a given sentence, and it can be utilized for analysis and modification of programs. Program slicing for hardware description languages should have a variety of applications in VLSI CAD, such as functional verification, test generation, designer assistance, and design synthesis. We show several examples of program slicing on VHDL descriptions, and address a list of related issues. 1 Introduction Hardware description languages (HDLs) are now being widely used as a tool for total system description, from low-level circuit descriptions to high-level abstract and conceptual descriptions. As design resources in the form of HDL descriptions are going to be accumulated, verification, maintenance and reuse of HDL descriptions will become an important issue. We propose apply..