Specification and Verification of Temporal Information Using Presburger Formulas

Abstract

We present a novel set of tools for performing symbolic timing verification of timing diagrams. The tools are multi-purpose with uses in verification, derivation of synthesis constraints, and design evaluation. Our methodology is based on techniques for manipulating Presburger formulas. We demonstrate via examples that Presburger formulas are very expressive and our verification results argue that complexity concerns should not prohibit their use. We also present a novel methodology for simplifying quantifier-free Presburger formulas using logic minimization algorithms thus greatly improving efficiency as well as yielding more readable results. 1 Introduction With regards to temporal behavior and design automation, there are many different problems to be considered. For example, ffi implementation verification -- which confirms that an implementation of a design and its associated delays will meet the constraints in the original specification, ffi interface verification -- which con..