A Two-Step Incremental Analog-to-Digital Converter

Abstract

A new incremental ADC is proposed which extends the order of a conventional incremental ADC from N to (2N-1) by way of a two-step operation. For a given conversion time, the duration of each step can be optimized. For an Nth-order IADC, the performance is equivalent to that of a (2N-1)-order converter. However, it only needs the same circuitry as the Nth-order one. The new IADC is hence more accurate, and also much more power-efficient than the conventional ones.This is an author's peer-reviewed final manuscript, as accepted by the publisher. The published article is copyrighted by IEEE-Institute of Electrical and Electronics Engineers and can be found at: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220. ©2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.Keywords: two-step incremental analogue-to-digital converter, power-efficient IADC, analogue-digital conversion, incremental ADC, two-step operatio