In view of recent developments in large-scale, complex digital systems, it is of interest to broaden the study of two-leveled logical systems to the study of three-leveled systems. This paper introduces the ternary logic system and develops a design approach for ternary digital systems that is based on familiar binary techniques. Ternary number systems are introduced and two base-conversion algorithms are given: one for integral numbers and the other for fractional numbers. Ternary arithmetic is similar to binary arithmetic or to decimal arithmetic. Four algebraic operations, Cycling, Negation, And, and Or, are then defined and the algebra is systematically developed through postulates and theorems. The algebraic method of minimization is difficult for a large number of variables or terms, and the map method is impracticable for more than three variables. Hence a programmable minimization method is developed by analogy with the Quine-McCluskey method for binary minimization. Diode-transistor schemes of circuit realization are presented. In these, the idea is to use p-n-p and n-p-n transistor pairs to provide the three different voltage levels desired. Tristable devices using three Cycling-gates are also described. A core storage element employs two differently oriented cores and provides one ternary digit of storage. Additional algebraic operations that are used in the current literature are given in the Appendix
