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Noise-Shaping SAR ADC Using Three Capacitors
Authors
J. L. Ceballos
C.-H. Chen
G. C. Temes
Y. Zhang
Publication date
Publisher
IEEE - Institute of Electrical and Electronics Engineers
Abstract
In this letter, a simple and highly efficient successive-approximation Registers (SAR) ADC realization is proposed. It requires an op-amp, a comparator and only three equal-valued capacitors. The proposed scheme is insensitive to the capacitor parasitics, and has a small capacitance spread. With an oversampled scheme, it also allows noise-shaping the remaining quantization error. It is well-suited for low-frequency instrumentation and measurement applications, and for use in extended-counting ADCs.This is an author's peer-reviewed final manuscript, as accepted by the publisher. The published article is copyrighted by IEEE-Institute of Electrical and Electronics Engineers and can be found at: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220. ©2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works
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Last time updated on 03/01/2024