This paper reports an approach for co-fabrication of silicon-on-insulator (SOI) sensors with low-resistance vertical electrical interconnects in thick (up to 600μm ) wafers. The thru-wafer interconnects double-sided (TWIDS) process is based on bottom-up seedless copper electroplating, and allows for voids-free features and high aspect ratio (wafer thickness to copper diameter ratio of 10:1). This work describes the design trade-offs, process flow, and characterization of interconnects. TWIDS technology is compatible with a standard SOI micro-electro-mechanical systems (MEMS) fabrication process and is applicable for micro sensors, such as accelerometers, gyroscopes, resonators, and RF MEMS devices, as well as for the 3-D MEMS assemblies. As a demonstration of potential applications, miniature toroidal ring gyroscopes were fabricated using the TWIDS process. The experimental characterization showed that the low-resistance interconnects with low parasitic losses are suitable for integration with capacitive-detection sensors. In addition, the mechanical stability of the interconnects is discussed in this paper, and a method to enhance structural rigidity by means of filling the insulating gaps with Parylene C is demonstrated. [2017-0179
