Integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500 C are studied. A set of practical design and performance equations is demonstrated. Experimental results are discussed in which both devices and simple circuits were successfully operated in 5000 C environments for extended periods. It is suggested that ITC's may become an important technology for high temperature instrumentation and control systems in geothermal and other high temperature environments

Depp, S.

Derouin, C.

Hamilton, D. J.

Kerwin, W.

Mccormick, J. B.

Roybal, L.

Wilde, D.

Wooley, R.

English

NASA Technical Reports Server

Abstract 
This r e p r t  descriks a class af devices knarn as 
integrated themionic circuits (PIC) capahle d ex- 
tended operatim in irabient taperatures up to  500%. 
lhe emlution of the IlC concept is &!sassed. A aet 
of practical design and performaroe equations is deb 
rmstrated. m n t  experimental results are discussed 
in which both devices and simple circuits have s u e  
oessfully operabed in 500.C envitorments for extended 
p e r i d  d t k .  
Arr>roadr 
Ihe ~ a a c f i  taken for IlC active devices has 
been to we the intrinsically higbteperature phe  
narenn d themionic emission in amjunction with 
*film integrateddrcuit technology to prdloe 
micrminiature, planar, vacuum triodes. lbe r e  
S u l t i n g  technology ms p h a t o l i ~ a p h i c a l l y  dclliIF 
eated thin films d refractory metals and cathode 
material ar heated, insulating substrates. Qpical 
-tries and dimwsions are sham in Fig. 1. Mary FlLY HEATED r0 
such devices are airmltanecxlsry fabricated on a single OEUNEAlED CATHODE I L W C  
subshate, giving high pcking density. 'Ihe i n t e  
grated grid-catho& structures are intrinsically rug- 
sea- Fig. l. Basic ITC gain device. 
Notice in this structure, the am&? is in the 
natural path of the electrars, and the clorsly incer- 
digitated grids and cathodes are used to  mximize grid 
CQItrol. In a sense, this structure is like a star- 
dard triode wi th  the grid moved danr into the plane of 
the cathode. In fa&, it has been sharn through colr 
ptet simulation and experimentally verlf ied that the 
f m b e n t a l  equaticn governing aunrentional triode 
pedolmance uw: be used to describe the pedonnance d 
an ITC device. 
wkre I is the place current, P 
Vg is the grid voltage, 
Vp is the plate voltage, 
C is the anplification factor, and 
K is a anstant called the perveance. 
. ~ L .  
.- .. 
hrrthenntxe, f &electrostatic analysis it has been 
sham that for a device w i t h  grid width, cathode 
width, and grid-tcecatho& spscing equal to a and 
arthodet~anode e c i n g  equal to d, 
lhm, p, the electrostatic anplificatian factor, is 
linearly related to  the ratio d/a, with no other ge<r 
metrical factors. lhis result is reaafkahly similar 
Ws work was arpported by the Divisim d 
Geotheaal mergy, US ueparbmt of Energy. 
LBn Reear&, San Yoee, California 
nWniver8ity of Arizona, maon, Arizona 
to that: obtained for a corrrentional triode. 'here- 
fore, ?%pending on the circuit ml icaticn, the &+ 
~ r e c  mlif icatim f actcr can sinply be selected by 
dete..mining d/a. 
A similar analysis for the device sham in Pig. 
2, where a is the width of the cathode, b the dstanctt 
between the grid tnd cathode, c the width d the grid, 
and d th- distance bekeen plate and cathode, results 
in 
which can easily be glnmed on a calculator. 
r 3  date, device processiny has been the u a ~ c  sp- 
*sized portion of the IlC devel-nt program. 
-id- 
Pig. 2. UnaquaZly .paced &via. 
https://ntrs.nasa.gov/search.jsp?R=19820007448 2020-03-21T15:51:46+00:00Z
SaFphire was chosen as  the substrate material for 
m: devices because of its high quality surface finish 
and h i g h  electrical resistivity a t  high temperatures 
( 2  8 x 10 I! -an a t  800°C) . 
Figure j is a side view of the fIT metalizatims 
on the circuit or device side of the substrate. 
Notice that all the metals are refractory bcause 
of the need to withstand higbtenperature environ- 
ments. (This is i n  contrast t o  the gold and aluninun 
used i n  corventional silicon integrated circuits. ) 
The bond pad is pl.atinum, and the platinun bond wires 
are z'tached by parallel-gap or ultrasonic wire 
inq. The Lse metal under the cathode i c  tungsten. 
?he cathode caating technique was developed Ln/ 
Gewr t ,  Core, and Mueller a t  Stanford Research 
Institute in 1969, 'Ihis !&chrique uses photoresist 
mixed with oxide -tho& coatjtq, which i s  then delin- 
eated photolithographically. 
1-i practice, the cathode a t i n g  is spun onto the 
wafer and delineated like photoresist. The circuit is 
then ~ c k a g e d  and placed on a vacuum m. 'fhe pack- 
aqa is evacuated acd tne cathode coating activated by 
app~ving p e r  to the heater until the substrate ap- 
proaches 900°C. 
lhliriq normal e r a t i o n ,  the heaters are used to  
heat the zubstrate to  75P-80O0C i n  order to provide 
acceptable electron enissim f ran the cathode (>loo Rh/and,. 
Figure 4 is a picture of the f i r s t  Los Alms ITC 
device, manufactured in  1977. 'R'le l ines and spaces 
are 5 m i l s .  'he heater pattern is visible on 'h back 
of the s ami re .  The darker fingers are the cathodes. 
Figure 5 is an array of three devices £ran 1979. 
' he  cathode and grid lines are 1 m i l ,  and spaces be- 
been grids and athode are 0.2 m i l .  
Because the oxide cathode is granular in  nature 
(with crystals on the order of 1 um), the 0.2 spacing 
a p a r s  to  represent an optimal limit to device size. 
?his technology yields a minimui dwice size of 
a ~ r o x i m t e l y  10 by 3.5 mils, which is enough to hold 
over 12,000 devices on a pair of 3/4-in.-dim saphire 
substrates. As w i l l  be desccited later, Factors other 
than minimun device size currently limit t * e  useful 
density of devices cn a substrate. 
f i e  higbtenperature operation tests oonducted t~ 
date f a l l  into two categories by time frame and pa&- 
age material. ?he run Septenber 1979 through February 
1980 used the stainless steel (302) or Kwar envelope 
mterials.  Higbtmperature vacuum fdthroughs using 
stainless t e e l ,  alminum, and high-tmprature brazes 
were designed for these packages by Ceramaseal C o v  
ratim, Ntw Lebnon, Nev York. Initially, these pack- 
ages had problens with the wolution of manganese, 
iron, and chrmiiun, ( in  the fonn of diatanic oxides, 
for exanple M, C? ) , plus the liberation of gases a t  
higher tenperatures. hs 3 result, these tests. & 
scribed in the upper portion of W l e  I, should only 
be considered prelininary. Even so, the 400.C test 
device operated successfully for wer  7000 hours. A 
nunber of simple circuits were als3 r m  in  higbteh.  
perature errrironnents using these i n i t i a l  packages. 
CATHODE COATING APPLIED AND DEFINED PHOTOGRAPHICALLY 
{ GRID COATED GRID INTERCONNECT BOND 1 
CATHODE PA0 
Fig. 3. rn metalization and photolithograghy. 
Fig. 4. First Los A l m s  fi device (1977). 
fig. 5. Ihree triodes (1979). 
50 
HIM 'lBR3A'lUE LIFE lEST SIm- 1st SERGS 
Start Bulb 
S lm? M 3 b e r i a l v  -
400°C +26-79 7750 R i d  Rdmr t b a p p m & b l e c W p & t ; ~ 1 ~ 6 0 0 0 ~ :  
BRissicn loss thereafter strFped a t  80B loss. 
500°C Fn-79 1608 Rrplifier ~ a m r  - gain d 1; individml tests Mated 
V-dence) enissicn loss. 
500°C F17-79 2590 RiaQ Ramr tb enianicn degradatial thrmgh 2000 hans; inaeahq 
gas load, BRissicn loss thereafter st@ a t  W. 
500°c 10-10-79 430 Ria&  war s tc~ped  - loss d enissicn. 
50O0C 10-4-79 4464 Triode S.S. NJ .bathticn Waqh 4000 h s :  enissicn lorn 
theredter stqqml a t  504 loss. 
6W°C 9--79 328 Triode Y w a r  Stqped - loss d enissicn. 
Mo0C 11-2-79 1070 Differential ar@ War Rqpd - decxeasirq a n :  electrical leakage 
(6-dMoe) cn substrate. 
500°C U-7-79 6144 Triode in Ti jiq Kwar &&al M i r e  in enissirn witfi increasing 
gas 1- after 2000 hcurs; stqpd at 50e loss. 
500.C 1-31-80 588 5-wz oscillator Kwar Oscillation e; e l ec t r i d  lsakage cn &&rate. 
MO°C 2-1980 816 %z oscillator br QEillaticn stqped; electrical leakage cn m a t e  
TIE atxue tests have all been teuninated. Fo1lwi.q tests are ongoing using hi-ity nidtel hrlls a d  "cleann 
~ddillq ~ l i q J e S .  
Start 10-8-80 Bulb 
lbm. rate Hws l 'Vm ktprial 
MO'C 5-900 3648 R i d  Ni &gradatim in enissicn; no leskage. 
550°C 7-8-80 2208 l'tiode Ni valved off pnp to f adlitate gas b u s t  t e e ;  
~ c p ? d  l q .  Burst test a t  1400 hours urli~w 
argn pesent; evidenoe d q s  cleared a d  &d not 
In a l l  cases, iailure was due to electrical leakage on 
the substrate because the metals were being liberated 
fran the package. 5a 5-MIz Hartlq oscillator oper- 
ated with both the a ~ c i t o r  and inductor a t  500°C. 
With the understandings evolved frcm the s ta iw 
less steel and Kwar tests, a newer package was de- 
signed uaing nickel. ?he f i r s t  test began b y  19, 
1980, and is still run~ing after 6312 hours. Figures 
6 and 7 shcm the device characteristics on M y  19 and 
October 9. The device characteristics are virtually 
unchanged. 
lte second test,  also ongoing, uses a device 
operating a t  550eC; the device is valved off the pmp 
t o  allw periodic gas-burst tests. This device is 
still being evaluated e t e r  2200 hours. The results 
are tentative because no signs of gas have been =en 
in the characteristics after the 1400-hour gas burst. 
Baaed on the tests pedonned to date, ITC tecb 
nology has demonstrated the ability to  aperste Fig. 6. Inprwed package (500eC) first day. 
5 1 
Fiq. 7. m i c e  (500°C) after 3600 hours. 
successfully and reliably for thousands of hours a t  
temperatures up to  500°C. %is temperature is r s t  the 
fmldamental l i m i t  for ITC devices, and with the evolu- 
tion of better ge t t e r i~q  techniques (more canplex than 
titanium) and packaging techniques (perhaps g l a s s  
ceramic - reference paper to  be given a t  this confer- 
ence by Dr. Cliff Ballard, .Sandia Laboratories), 
higher temperature operations are expected in the 
future. 
The design of ITC circuits is ill many ways simi- 
lar t o  the design of c.lnventiona1 integrated circuits. 
Therefore, ITC design techniques use the ~ d ~ a n t . . g e ~  
gained fran the simultiineous fabrication of mny & 
vices on the sam substrate. me inherent matching of 
device characteristics and the tracking of these char- 
acteristics mer tenperature and l i f e  are exploited. 
Functiml circuit  elenents such as differentioral 
sLges, current sources, and circuits that use active 
devices as  loads have been fabricated using discrete 
I'TC dwices, and their performance has been verified 
against theory. 'IM silnple active loau, shown in 
Fig. 8, is particularly valuable becau:e its gain 
- 
Fig. 8. Gain stage with active load. 
t - f i i . i )  i s  orly &p'nlmt on dwice geanetry, the ratio 
of line width to  cathodeanode spacing. Therefore, 
the gain of the stage i s  independent of the trans- 
conductances of the two devices and, he;lce, of the 
Operating tenperatures. 
A s  a result of the surcess of designing func- 
tional I T  circuits using discrete devices, the design 
of inteqratzd TTC circuits has become the recent em 
phasis oi the program. Because these efforts are on- 
ooing, this section w i l l  mainly contain general mm 
ments and Sirections for future work. 
The design of integrated circuitry with cmplex 
functions on a single pair of sl2ztrates presents new 
challenges and possibilities as  a r?sult oE devic? 
matclung and, uniortun7tely, sane problems, in p rtic- 
ular, electrostatic interactions between devices. 
r .Itre 9 schcmtically depicts the origin of 
suck. interactions. 
-+ =ELECTRIC FIELD 
"ig. 9. Electro-tic interactions. 
fie key to  increasing the functional complexity 
and maximm gain on a single substrate pair w l l l  be 
the developnent of appropriate techniques for making 
design tradeof f s between device la1 ~ u t  ,psi tion on 
the substrate) and circuit function. 
Although results are still tentative, Figs. 10 
and 11 show the layout of one experimental pair of sub- 
strates for a differential gain stage. In current ex- 
periments, a series of device masks are used t o  photcr 
iithographically generate an array of devices, which 
are then interconnected using a series of masks with 
line segnents. Results suggest that a reasonable 
2-year g ~ a i  for ITC technology is the design of an 
op-rational anplifier wlth a voltage gain of 1000 or 
morc on a pair of 0.75-in.-diam substrates. 
Baaed on the results described above, the future 
for rrC tc?chnology is bright. P r o g r m t i c  efforts 
have led t n  an ITC technology with Qmonstrated high- 
tenperatcre capability (500.C fcr thousands of hours) 
and t o  fabrication tech~iques mmnensurate with mass 
production. Physical models and detailed device un- 
ckrstandinqs have been develcpcd. Preliminary cir- 
cuits using discrete dwices, single not integrated, 
ha.le denmstated the potential of ITCS. ~ l l  that r e  
mains is the final developnent of integrated circuit  
design techniqws and the demonstration of intyjrated 
circuity. 
Ihe results of the lTC deveiopnent program su - 
?st that ms may becane an important technology ?or 
hlgh-tenpecature instrunentation and control systems 
in qeothermal and other higbtrmperature e n v i r o m n t s .  
Fia. 11. Substrate 2 ,  differential  gai 
Fiq. 10. Substrate 1, differential  gain stage. 
n stage. 


Development of integrated thermionic circuits for high-temperature applications

Development of integrated thermionic circuits for high-temperature applications

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