Ion implantation techniques that permit the reproducible fabrication of bipolar GaAs integrated circuits are studied. A 15 stage ring oscillator and discrete transistor were characterized between 25 and 400 C. The current gain of the transistor was found to increase slightly with temperature. The diode leakage currents increase with an activation energy of approximately 1 eV and dominate the transistor leakage current 1 sub CEO above 200 C. Present devices fail catastrophically at about 400 C because of Au-metallization

Doerbeck, F. H.

Mclevige, W. V.

Yuan, H. T.

English

NASA Technical Reports Server

FABRICATION AND HIGH TEWERATURE CHARACTEr(t $TICS OF ION-IWUNTED 
GaAs SIPOLAR M S I  STORS AlSD RING-O'.'CILLATORS* 
F.H. Doerbeck, H.T. Yuan, W.V. I k lev ige 
Texas Instrments Incorporated 
h l l a s ,  TX 75265 
I NTKOMICiION 
A growing need. i s  developing f o r  monolithic semi- 
conductor c i r m i t s  for high terperature environments. 
St-devices hwe  been reported t o  operate up t o  
300°C.'*2 Because the upper operating teaperature of 
a bipolar device i s  determined by the bandgap o f  the 
semicoqductor material , GaAs (1.43eV) has a theoret i - 
cal  advantage over s i l i con (1.12eV). Based on bandgap 
considerations exclusively, GaAs could be expected t o  
be useful up t o  450°C; ; . fact, transistors have been 
operated at  t h i s  tmperature.3 Based nn these 
assessments a special program t o  study the high ten- 
perature aswcts o f  GaAs bipolar  transistors was i n i -  
t l a ted  i n  1966. The results o f  t h i s  program, which 
were reported i n  1968". shared: QAs transistors were 
l tmfted by leakage currents, rh ich exhibited a ten- 
perature dependence with an a c t i v a t i w  energy of 
0.7eV. The current g i n  hfe decreased rapidly with 
i n c t ~ a s i n g  tempe;-ature with an activation energy o f  
approx. 0.2eV, apparently due t o  a decrease o f  the 
minority car r ie r  1 i f r t i ~ne .  rlevices which operated 
above 400°C could he mde, but the fabrication y ie ld  
was extremely small. The technologj available a t  t h i s  
time was constrained t o  si' lfur and magnesium d i f -  
fusions rt temperatures at which surface decomposition 
could not su f f ic ien t ly  be suppressed. Wping control 
was poor. The devices had mesa structures wi th l i t t l e  
surface passivation. The fabrication o f  a sophisti- 
cated GaAs I C  was beyond reach. 
During the recent years the GaAs technology 
progressed rapidly, motivated ,dainly by the excel len t  
performance o f  microwave FET's. Ion implantation and 
annealing techniques were &valoped t o  f a n  reproduc- 
i b l y  t h i n  layers o f  controlled doping levels. This 
progress made i t  desirzble t o  re-evaluate the GaAs 
bipolar  device performance. Potenti a1 advantages o f  a 
GaAs bipolar technoioqy include: short minority 
car r ie r  l i fet ime; high electron mobi l i ty  at  low 
electron f ields; u'e o f  saturated d r i f t  velocity f o r  
load resistors (small area requirements); isolation-by 
boron implantation (requires less area than junction 
i solation) ; higher operating temperature than s i  1 icon 
devices. The bipolar  technology would perni t  the 
application o f  established Si bipolar c i r c u i t  concepts 
and d e l s  wi th only minor modifications. Some disad- 
vantages o f  GaAs, namely the low hole mobi l i ty  and the 
caaparatively low naximm donor concentration w i  11 
remain with us. The poss ib i l i t y  o f  d i f y i n g  the 
bandgap by using GaAlAs, e.g. fo r  wide band gap 
mi t ters,  and o f  incorporating opto-electronic p r i  n- 
c ip les make, t h i s  technology part icular ly exciting. 
The main difference between the s i tuat ion a decade ago 
and today i s  that ion-inplantation of fers the repro- 
ducible production of p n  junctions, avofding the 
damgin9 high temperature diffusions. Origfnally our 
pt esent program was designed t o  study the feas ib i l i t y  
o f  i GaAs bipolar I C  technology but not speci f ical ly  
r%-fi-Ga-G3-@hly<cfeaa- Eji-mFrFGAiF3NK- 
Contract No. NO0014-80-C-0936. 
the high temperature aspects. Results d ta ined  with a 
15-stage ring-oscil  l a t o r  were reported recently .5 1 t  
wf 11 be apparent that  specif l c  nodiffcations w i l l  have 
t o  be incorporated t o  extend performance acd re l i ab i l -  
i t y  t o  higher tenperatures, such as the replacement 
o f  the alloyed gold contacts. This paper w i l l  discuss 
the fabr icat ion and high temperature performance o f  
discrete bipolar  t ransistors and of a 15-stage r ing  
osci 1 lator. 
DEVICE FABRICATION 
The fabr icat ion o f  GaAs bipolar  transistors by 
ion implantation fnto bulk GaAs has been reported 
p r e ~ i o u s l y . ~  The fabr icat ion o f  the r ing-osci l lator  
requires an epi taxia l  nln+ structure. The s tar t ing  
GaAs substrates, purchased from carmercial suppliers, 
come from Hridgnan-grown single crystals. The 
AsCl3-Ga-H? vapor phase epi taxia l  process i s  employed 
t o  ieposit -2 layers: f i r s t  an approx. 3 micron thick 
layer with a donor concentration o f  approx. 8 x 
m3, followed by an undoped layer, approx. I 
mi-ran thick. The VPE technology, as applied t o  
microwave devices i n  ou* laboratory, has previ arsly 
been described i n  the l i t e r a t ~ r e . ~  
Fig. 1 Cross-section o f  a bipolar I C  structure 
The cross-section of a bipolar  IC-structure i s  
shown i n  Fig. 1. The npn t ransistor  operates i n  the 
"upw-mode: the n+-epitaxial layerlsubscrate acts as 
emitter, the surface n-layer i s  the collector. Alsc 
shown i s  the load resistor. The fabricated structures 
d i f f e r  from Fig. 1 i n  one respect: they have only 
one alloyed col lector  contact on the n-type surface 
layer. 
The formation o f  the n- and p- layers employs 
ion-implantation. The detai 1s of the donor implan- 
ta t i on  are drawn from extensive experie.ice wi th GaAs 
FET'S.~ The base-layer i s  formed by a deep lnrplant o f  
Be, which i s  known t o  have high act ivat ion a t  low 
anneal temperatures. , l o  Pre~ervat ion o f  the GaAs 
surface morphology during the high tmperature 
https://ntrs.nasa.gov/search.jsp?R=19820007447 2020-03-21T15:52:06+00:00Z
annealing step I s  achieved by the  proxiini t y  anneai i n g  
technique. e*ll The sequence o f  fabr icat ion zteps f o r  
the  b i p o l a r  s t ruc tu re  i s  as fol lows: 
1. Shallow Se implant (1 x 1013 cm-L 150 keV 
p lus 2 x 1013.n-2, 360 keV a t  353%). 
2. Anncal a t  850°C f o r  30 min. 
3. Deep Re implant (6 x lo1' cm-2, 180 keV) t o  
form the base layer. 
4. Anneal a t  800°C. 30 minutes. 
5.  Local ized Re imp l ln ts  t o  form the p+ contact 
r e  ions (1 x In!' c r 2  a t  40 keV p lus 1.5 x 9 10 ' ~ m - ~  a t  80 keV). 
6. Anneal a t  700°C, 30 minutes. 
7. Local ized Roron implant t o  form the i so la -  
t i o n  region ( Z  x IOIL, 4 x 10i2. 6 x 10;2 
~ m - ~  a t  50, 140: 320 keV, respect ively).  
SijNq serves as implant mask and f o r  device pas- 
s ivat ion.  Contacts are al loyed Au-Ce-Ni f o r  the n- 
type material  and a l loyed Au-Zn f o r  the p-type base. 
T i  - Au i s  used f o r  interconnections. St r ipes o f  
GaAs, whose width i s  adjusted by a Roron implant, 
serve as load res is tor .  
The doping p r o f i l e  o f  the complete s t ruc tu re  i s  
presented i n  Fig. 2. The ion-implantea p r o f i l e s  are 
ca lcu lated according t o  the LSS-theory, mooif i ed  by 
e x p e r i m e ~ t a l l y  observed act ivat ions. The t r a n s i t i o n  
from the n+ epi layer  t o  the surface n-layer was 
eztabl ished by C-V p r o f i l i n g .  
Fig. 2 Doping p ro f ; l e  
Fig. 3 GaAs Ring-Oscil l a t o r  
DEVICE PFRFC?MANCE 
-- 
f i  15-stage r i n g  o s ~ i l l a t o r  was tested i n  the tm- 
perature range o f  25OC - 390°C. Fiq. 3 shows a 
micrograph of the c i r c u i t  a f t e r  t h i s  test .  The c i r -  
c u i t  was mounted i n  a ceramic IC-package and p1a:ed i n  
an oven. The package was not sealed. i.e. the GaAs 
device was exposed t o  hot a i r  during the  tes t .  The 
b ias  voltage was 1.75 vo l t .  resu l t i ng  i n  a t o t a l  i npu t  
current  o f  5 nd a t  25OC, increasinq t o  7mA a t  385OC. 
Fig. 4-6 present the output signal a t  25". 240°C. 
385°C. The gate delay time increases from 3.311s a t  
25OC t o  6.7ns a t  385°C. The t ime constant o f  the c i r -  
c u i t  i s  dominated by the product o f  the capacity of 
the  forward biased cmi t te r  diode times the load 
res is tor .  The decrease of the e lect ron m o b i l i t y  i n  
t h e  Gaks load r e s i s t o r  causes the time constdnt t o  
increase. The output signal o f  the r i n g  o s c i l l a t o r  
approx. t r i p l e s  w i t h  r i s i n g  temperature. Two e f fec ts  
contribute t o  t h i s  ef fect : l . the incre3sed value o f  the 
load resistor; 2. The s h i f t  of the Fermi leve ls  
tonards the center of the bandgap w i t h  increasing tem- 
perature decreases the bui 1 t-i n voltage of the mi t t e r  
junct ion. thereby increasing the i n j e c t i o n  current  and 
decreasing the saturat ion voltage. The r i n g  o s c i l l a -  
t o r  f a i l e d  a: 390°C. The examination o f  the f a i l e d  
device shows a damaged m t a l l i z a t i o n  i n  the v i a  holes 
o f  the voltage supply bar, as shown i n  Fig. 3. m i i s  
was probably caused by a rea l loy ing  o f  the Au 
contacts, and a subsequent break i n  the m t a l l i z a t i o n  
on the  v i a  sidewalls. 
A d isc re te  b i p o l a r  t r a n s i s t o r  o r  t h i s  same ch lp  
nas subsequent 1 y character ized i n  deta i  1. The t ran-  
s i s t o r  charac te r i s t i cs  were measured both f o r  
"downU-mode (surface layer  as emi t ter )  and the  
"upM-mode (surface as col lector .  corresponding t o  the  
mode i n  thc  r ing-osc i  1 la to r ) .  Furthermore the  leakage 
currents  o f  the emi t ter  diode, the c o l l e c t o r  diode and 
ICEO were detennined between 25OC and 400°C. Fig. 
7-10 present some curve t racer  p ic tures o f  the t ran-  
s i s t o r  characteri;t ics a t  d i f f e r e n t  temperatures. The 
device e x h i b i t s  current  gain beyond 400°C. The usefu l  
temperature range i s  l i m i t e d  by junc t lon  leakage 
currents. Fig. 11 presents p l o t s  o f  1 ~ ~ 0 ,  i n  both 
"up" and "down" mode, and the emi t te r  and c o l l e c t o r  
diode leakage currents at  2 v o l t s  vs the rec iprocal  
temperature. Both diodes have very s i m i l a r  leakage 
currents w i t h  a temperature dependence corresponding 
t o  an a c t i v a t i o n  energy of approx. lev. IC 0 i s  tem- 
perature insensitive t o  about 200°C; then !t becomes 
dominated by the leakage current  o f  the  reverse biased 
c o l l e c t o r  junct ion. The dif ference i n  Ic-0 i n  the 
Fig. 4 GaAs Ring-nsc i l la tor ,  2 5 O C  
Fig. 5 Gats Ring-Osci 1 la to r ,  240°C 
Fig. 6 GaAs Ring lJsc i l la tor ,  3 8 5 O C  
two nodes i s  probably caused by the asymmetry o f  the 
doping p r o f i l e  and the geometry cf the t r a n s i s t o r  
structure. -he current gain as a funct ion o f  tem- 
perature i s  presented i n  Fig. 12. :r, the "up"-mode 
h f e  
i s  temperature insensi t ive t o  approx. 350°C. This 
c.rformance i s  i n  contrast w i th  resu l t s  obtained 
p ~ * e v i o u s l y ~  from dif fused t rans is to rs  where the 
current gain of the best device began t o  decrease 
a 1 ready be1 ow 250°C. 
CONCLUSION 
Ion-implantat i  on techniques permit the reproduc- 
i b l e  f a b r i c r t i o n  o f  b ipo la r  GaAs IC's. A 15-stage 
r i n g  o s c i l l a t o r  and df screte t r a n s i s t o r  was charac- 
te r i zed  between 25' and 400°C. The current  gain of 
the t rans is to r  was found t o  increase s l i g h t l y  w i th  
temperature. The diode leakage currents increase wi t h  
an ac t i va t ion  energy of approx. 1 eV and dominate the 
t r a n s i s t o r  leakage current ICEO above 200°C. Present 
r ig .  ' Ga4s b ipo la r  t r a n s i s t o r  
a t  2 5 O r : .  " dW' -qode  
Fig. 8 GaAs b ipo la r  t r a n s i s t o r  
a t  2!i°C, "rrp"-noje 
Fig. 3 GaAs b ipo la r  t r a n s i s t c r  
a t  390°C. "dawnn-mode 
Fig. 10 GaAs b i p o l a r  t r a n s i s t o r  
a t  400°C, "upw-mode 
i .: 
..:L a c 
. ,:. 
5.L . * -  
.-. 
.f devices f a i l  catastrophical iv a t  - 4M°C because of 
the Au-actallization. For the developlent o f  a 
re l i ab le  GaAs bipolar  IC-tcchoi rgy f o r  the 350°C-range 
the  fo l  lowlng subjects have t o  be addressed: 
Inplanentation of n f r a c t o r y - m e t ~ l  contacts; ra is ing 
of doplng levels t o  minfmlze the dcnletlon layer width 
and t o  decrease the t&erat.qre sensitivity; 
inprovenent o f  surface passf vat ion. The p r f o m . ~ c e  
of GaAlAs structures should be studied v i t h  respect t o  
leakage currents and surface degradaiion. It i s  
knoun, e.g. that the addit ion o f  smzll A1 con- 
centra:fons t o  the active zone o f  in jecbion lasers 
reduce degradation. 
The authors acknowledge the technical assist:nce 
o f  J.A. Ui 11 ians and 1.0. Brandon. 
REFERENCES 
1. D.C. Dening, L.J. Ragonose, S.C.Y. Lee, "Intrgra- 
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2. D.U. Palmer, R.C. Hecknan. "Extretne Tenperature 
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ponents hybrids and manufacturing technology, 
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3. H. Strack, 'Iron Doped GaAs Transistorsn, GaAs, 
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4. F.H. Doerkck. E.E. Harp, H.A. Strack, "Study of 
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Fig. 11 Diode leakace currents and ICEO as a 
function o f  >he reciprocal temperature 
Fig. 12 r ~ ~ r r e n t  gain as a function of 
the xc ipraca l  t m p e r a t ~ r e  
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Fabrication and high temperature characteristics of ion-implanted GaAs bipolar transistors and ring-oscillators

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