We have investigated the influence of electron-beam writing on the creation of charge trapping centers which cause 1/f noise in single electron transistors (SET). Two Al/AlOx/Al devices were compared: one where the SET is on a {100} silicon wafer covered by a 120-nm-thick layer of Si3N4, and another one in which the Si was etched away from below the nitride membrane before patterning the SET. The background charge noise was found to be 1×10 exp −3 e/√Hz at 10 Hz in both devices, independent of the substrate thickness.Peer reviewe

Hakonen, Pertti J.

Ikonen, J. M.

Paalanen, M. A.

Parts, U.

Penttilä, J. S.

Roschier, L. R.

Aaltodoc Publication Archive

This is an electronic reprint of the original article.This reprint may differ from the original in pagination and typographic detail.Author(s): Hakonen, Pertti J. & Ikonen, J. M. & Parts, U. & Penttilä, J. S. &Roschier, L. R. & Paalanen, M. A.Title: Noise of a single electron transistor on a Si3N4 membraneYear: 1999Version: Final published versionPlease cite the original version:Hakonen, Pertti J. & Ikonen, J. M. & Parts, U. & Penttilä, J. S. & Roschier, L. R. &Paalanen, M. A.. 1999. Noise of a single electron transistor on a Si3N4 membrane.Journal of Applied Physics. Volume 86, Issue 5. 2684-2686. ISSN 0021-8979 (printed).DOI: 10.1063/1.371110.Rights: © 1999 AIP Publishing. This article may be downloaded for personal use only. Any other use requires priorpermission of the authors and the American Institute of Physics. The following article appeared in Journal ofApplied Physics, Volume 86, Issue 5 and may be found athttp://scitation.aip.org/content/aip/journal/jap/86/5/10.1063/1.371110.All material supplied via Aaltodoc is protected by copyright and other intellectual property rights, andduplication or sale of all or part of any of the repository collections is not permitted, except that material maybe duplicated by you for your research use or educational purposes in electronic or print form. You mustobtain permission for any other use. Electronic or print copies may not be offered, whether for sale orotherwise to anyone who is not an authorised user.Powered by TCPDF (www.tcpdf.org)Noise of a single electron transistor on a Si 3 N 4 membraneP. J. Hakonen, J. M. Ikonen, Ü. Parts, J. S. Penttilä, L. R. Roschier, and M. A. Paalanen  Citation: Journal of Applied Physics 86, 2684 (1999); doi: 10.1063/1.371110 View online: http://dx.doi.org/10.1063/1.371110 View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/86/5?ver=pdfcov Published by the AIP Publishing  Articles you may be interested in Measurement and analysis of 1/f noise under switched bias in organic thin film transistors Appl. Phys. Lett. 104, 023301 (2014); 10.1063/1.4858935  Low-frequency noise characteristics of HfSiON gate-dielectric metal-oxide-semiconductor-field-effect transistors Appl. Phys. Lett. 86, 082102 (2005); 10.1063/1.1866507  Correlation between the 1 ∕ f noise parameters and the effective low-field mobility in Hf O 2 gate dielectric n -channel metal–oxide–semiconductor field-effect transistors Appl. Phys. Lett. 85, 1057 (2004); 10.1063/1.1779967  Low-frequency noise and radiation response of metal-oxide-semiconductor transistors with Al 2 O 3 / SiO x N y /Si (100) gate stacks Appl. Phys. Lett. 83, 5232 (2003); 10.1063/1.1635071  1/f γ noise in polycrystalline silicon thin-film transistors J. Appl. Phys. 85, 3934 (1999); 10.1063/1.369770    [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:130.233.216.22 On: Mon, 28 Sep 2015 07:36:25Noise of a single electron transistor on a Si3N4 membraneP. J. Hakonena), J. M. Ikonen, U¨ . Parts, J. S. Penttila¨ , L. R. Roschier,and M. A. PaalanenLow Temperature Laboratory, Helsinki University of Technology, P.O. Box 2200, FIN-02015 Espoo HUT,Finland~Received 5 January 1999; accepted for publication 27 May 1999!We have investigated the influence of electron-beam writing on the creation of charge trappingcenters which cause 1/f noise in single electron transistors ~SET!. Two Al/AlOx /Al devices werecompared: one where the SET is on a $100% silicon wafer covered by a 120-nm-thick layer of Si3N4,and another one in which the Si was etched away from below the nitride membrane beforepatterning the SET. The background charge noise was found to be 131023e/AHz at 10 Hz in bothdevices, independent of the substrate thickness. © 1999 American Institute of Physics.@S0021-8979~99!02517-7#INTRODUCTIONSingle electron transistors ~SET!, as well as other de-vices based on tunneling of individual electrons, have beeninvestigated vigorously during the past decade.1,2 One of themajor problems hampering practical applications of such de-vices has turned out to be the strong, ubiquitous 1/f noisewhich easily drives these devices out of their operatingpoints unless compensative measures are taken. Therefore,this noise presents a fundamental problem on the operationand integration of single electron devices.A lot of effort has been put into understanding the 1/fnoise in single electron transistors. The present picture,based on several investigations,3–12 indicates that the noise iscaused by trapping centers of charge both in the vicinity ofthe island as well as in the tunnel barriers themselves. Some-times conductance fluctuations in the tunnel barriersdominate,8 while typically background charge fluctuations onthe substrate are more important, as demonstrated in corre-lation measurements9 and in detailed studies of trapping statedynamics.10We have investigated how much of the 1/f noise inSETs can be attributed to the lithography phase, i.e., to thee-beam writing process that is known to cause damage in thesubstrate. Is the amount of damage large enough so that itcauses a major fraction of charge trapping states and,thereby, most of the 1/f noise. To test this hypothesis wehave considered two structures in which the amount of dam-age in the e-beam writing should differ radically: one wherethe SET is on a $100% silicon wafer covered by a 120-nm-thick layer of Si3N4, and another one in which the Si wasetched away from below the nitride membrane before pat-terning the SET. By making the substrate thickness small itis possible to reduce the amount of backward scattering ~sec-ondary electrons! and, thereby, to minimize the damage inthe e-beam writing process.As there is evidence that the noise scales with SETsize,7,8 we chose to work with quite large island areas so thatthe sensitivity towards substrate defects would be large. Wealso chose to work with superconducting samples since thecharge sensitivity is higher but the charge trapping shouldnot be affected in any way.13 Within our resolution, however,no contribution can be assigned to the e-beam writing pro-cess.SAMPLE FABRICATIONThe samples were manufactured using a 375-mm-thickSi substrate with both sides covered by 120-nm-thick Si3N4layers. The silicon nitride was grown using low-pressurechemical vapor deposition which yielded membranes underconsiderable tensile stress. Hence, free-standing structurescould be easily constructed.First, a window of size 600 mm3600 mm was etched tothe back Si3N4 layer using reactive ion etching ~RIE! withCHF3. A 35 nm layer of chrome, patterned using PMMAresist and a K3Fe~CH!6-based etching solution, made up themask in the RIE step. The final step, the etching through theSi substrate, was made with 20 mass % KOH solution at70 °C.14 The etching in KOH took 5 h and provided us witha free-standing 100 mm3100 mm Si3N4 membrane. A two-layer resist, made of 250 nm of PMMA/MAA and 100 nm ofPMMA, was then spun on top of the membrane in order tofacilitate regular e-beam lithography. The last step was theonly one in the fabrication of the unetched reference sample.The SETs were made using a standard two-angle evapo-ration technique15 with resistive Al evaporation. The geomet-ric size of the junctions at the ends of a 14031200 nm2 cen-tral island were 1003100 nm2. The total capacitance of theSETs was determined from the offset voltage Vb5e/C of theIV curve at large bias. The etched sample ~E! had a totalcapacitance of 1.2 fF while for the unetched sample ~U! weobtained 1.8 fF. The gate capacitance Cg was determinedfrom the periodicity of the modulation curves: Cg(E)510 aF and Cg(U)592 aF. The sum of the tunneling resis-tances was 400 and 215 kV for samples E and U, respec-tively.a!Electronic mail: pjh@neuro.hut.fiJOURNAL OF APPLIED PHYSICS VOLUME 86, NUMBER 5 1 SEPTEMBER 199926840021-8979/99/86(5)/2684/3/$15.00 © 1999 American Institute of Physics [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:130.233.216.22 On: Mon, 28 Sep 2015 07:36:25NOISE MEASUREMENTSOur experiments on noise covered the frequencies0.2–50 Hz. The upper limit was set by the RC time constantof the sample and wiring setup. The lower end was limitedby the temporal stability of the SET operating point. At 0.2Hz, the duration of the record was about 5 min. The gain ofthe SET remained practically unchanged over this period oftime and, thus, a feedback arrangement keeping the operat-ing point stable was not considered necessary.6 In fact, evenlonger measuring periods could have been possible but 0.2Hz was definitely a safe cutoff.The noise measurement on sample E was carried outusing an SR830 lock-in amplifier ~Stanford Research Sys-tems, Sunnyvale, California!. This device has a built-in nu-merical algorithm to calculate the magnitude of Gaussiannoise. For all measuring frequencies the equivalent noisebandwidth (1/8t) was taken to be less than 1/5 of the fre-quency. The measuring time ~the averaging time of thesamples! was proportional to the time constant t of lock-inby a factor of 10–80. Owing to these conditions, a datarecord lasting for 50/f was employed in the measurement ateach frequency f . Reference sample U was measured using aHP89410 spectrum analyzer.We followed the procedure outlined by Starmark et al.12and measured the noise separately using the minimum andmaximum gain of the SET. This ensured that the origin ofthe noise can be traced back to the SET itself. Using modu-lation techniques, we were also able to check that the majorpart of the noise in sample U came from background chargevariations and not from 1/f resistance fluctuations.RESULTSWe made our experiments in the superconducting stateat 150 mK. The advantage of the superconducting state isthat single electron effects can be seen more easily at hightemperatures.4,13 At this temperature, the operating point ofthe minimum gain is not too sharp, as seen from the inset inFig. 1. In addition, when operating at high temperatures weavoid problems with self-heating which can be substantial incertain cases.16 Since previous experiments have not shownany strong T dependence at the lowest temperatures,5 experi-ments at T5150 mK were considered sufficient.Figure 1 illustrates IV curves measured on sample Eusing current bias at three different gate charges; the gatebiasing points are denoted by arrows on the modulationcurve shown in the inset. The maximum modulation 70 mVis somewhat less than the value e/C obtained from the IVcurve offset measurements in the normal state. Since the gainis almost constant over large variation in the gate charge,even large background charge fluctuations can be toleratedwithout the need of feedback in the noise measurements.When measuring at minimum gain, the operating point waschecked right before and after the noise scan.Our results on SET noise are displayed in Fig. 2. Thegeneral shape, showing saturation at the lowest frequenciesand a corner to ;1/f dependence around 1 Hz, agrees withformer experiments ~see, e.g., Refs. 10–12!. The noise islarge, two orders of magnitude larger than the reported valuefor the best, stacked construction,8 which reflects the fact thatthe island size ~and, consequently, the junction size! waschosen to be rather large. At 10 Hz, we obtain 331023 e/AHz in the superconducting state while in the nor-mal state the corresponding figure is 231023 e/AHz; aftersubtracting the noise at minimum gain we obtain 131023 e/AHz in both cases.The noise over 1–50 Hz was found to be the same forthe etched and unetched samples. Below 1 Hz, however,there is a slight difference. The corner between constantnoise and 1/f behavior takes place at lower frequencies forsample U than for sample E. The data have been omittedfrom the picture because the gain changed below 1 Hz due tothe ac input filter of the HP89410 spectrum analyzer. Thesmaller amount of low-frequency noise in the etched samplewas seen in the IV measurements as well: the curves mea-sured over 2 min on sample E are much more stable than onsample U.DISCUSSIONOn the basis of this work, we are inclined to concludethat the quality of the original substrate is more importantthan the minimization of defects produced by the e-beamFIG. 1. IV curves measured on the SET on a Si3N4 membrane for three gatecharges: ~a! 0, ~b! 0.2e, and ~c! 0.5e. Temperature T5150 mK. The insetshows the gate modulation of the drain voltage using 0.38 nA bias current.Arrows denote the locations of the gate biasing points in the IV measure-ment.FIG. 2. Charge noise measured on an ‘‘etched’’ (s ,d) and on an ‘‘un-etched’’ ~-! SET. The filled and open symbols refer to measurements atminimum and maximum gain, respectively. For the unetched sample, onlydata at maximum gain are shown.2685J. Appl. Phys., Vol. 86, No. 5, 1 September 1999 Hakonen et al. [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:130.233.216.22 On: Mon, 28 Sep 2015 07:36:25writing procedure. In this sense, the recommendation of Ref.8, viz. that the contact area between the SET and the sub-strate has to be minimized, sounds reasonable. It is possibleof course that our Si3N4 membranes were not thin enough toreduce the damage caused by secondary electrons in the writ-ing process or that etching by KOH induced potassium atomsinto the substrate,17 even though their mobility is ratherlimited.18 On the other hand, large stress of the substratesmight play a role and, therefore, it would be interesting tomake similar experiments on nonstoichiometric Si3N4 mem-branes with less tensile stress.One way to improve the results might be to etch the SETstructure completely free as has been done with wires andfilms.19 Of course, the present design with a loose gate is notsuitable, but a separate back gate could well be used. Anensuing problem is that reactive ion etching does producedefects in the aluminum itself, which has been seen clearlyas an increase in the superconducting transition temperature.ACKNOWLEDGMENTSThe authors are obliged to Sami Franssila ~State Re-search Center, Espoo! for the Si3N4 coatings. The authorswish to thank Mikko Kiviranta, Alexander Korotkov, SamiLa¨hteenma¨ki, Heikki Seppa¨, and Alexander Zorin for usefuldiscussions. This work was financially supported by theAcademy of Finland, by TEKES of Finland via the Nano-technology program, and by the Human Capital and MobilityProgram ULTI of the European Community.1 D. V. Averin and K. K. Likharev, in Mesoscopic Phenomena in Solids,edited by B. Altschuler, P. Lee, and R. Webb ~Elsevier Science, Amster-dam, 1991!, p. 173.2 A. N. Korotkov, in Molecular Electronics, edited by J. Jortner and M. A.Ratner ~Blackwell, Oxford, 1997!, p. 157.3 G. Zimmerli, T. M. Eiles, R. L. Kautz, and J. M. Martinis, Appl. Phys.Lett. 61, 237 ~1992!.4 J. M. Hergenrother, M. T. Tuominen, T. S. Tighe, and M. Tinkham, IEEETrans. Appl. Supercond. 3, 1980 ~1993!.5 D. Song, A. Amar, C. J. Lobb, and F. C. Wellstood, IEEE Trans. Appl.Supercond. 5, 3086 ~1995!.6 E. H. Visscher, S. M. Verbrugh, J. Lindeman, P. Hadley, and J. E. Mooij,Appl. Phys. Lett. 66, 305 ~1995!.7 S. M. Verbrugh, M. L. Benhamadi, E. H. Visscher, and J. E. Mooij, J.Appl. Phys. 78, 2830 ~1995!.8 V. A. Krupenin, D. E. Presnov, M. N. Savvateev, H. Scherer, A. B. Zorin,and J. Niemeyer, J. Appl. Phys. 84, 3212 ~1998!.9 A. B. Zorin, F.-J. Ahlers, J. Niemeyer, T. Weimann, H. Wolf, V. A.Krupenin, and S. V. Lotkhov, Phys. Rev. B 53, 13682 ~1996!.10 N. M. Zimmerman, J. L. Cobb, and A. F. Clark, Phys. Rev. B 56, 7675~1997!.11 A. N. Tavkhelidze and J. Mygind, J. Appl. Phys. 83, 310 ~1998!.12 B. Starmark, T. Henning, T. Claeson, P. Delsing, and A. N. Korotkov,cond-mat/9806354.13 A. N. Korotkov, Appl. Phys. Lett. 69, 2593 ~1996!.14 See, e.g., M. Madou, Fundamentals of Micromachining ~CRC, Boca Ra-ton, FL, 1997!.15 G. J. Dolan, Appl. Phys. Lett. 31, 337 ~1977!.16 R. L. Kautz, G. Zimmerli, and J. M. Martinis, J. Appl. Phys. 73, 2386~1993!.17 TMAH would have been a safer choice for etching as pointed out by thereferee.18 S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era ~Lattice,Sunset Beach, CA, 1986! Vol. 1, p. 192.19 Y. K. Kwong, K. Lin, P. J. Hakonen, J. M. Parpia, and M. Isaacson, J.Vac. Sci. Technol. B 7, 2020 ~1989!.2686 J. Appl. Phys., Vol. 86, No. 5, 1 September 1999 Hakonen et al. [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:130.233.216.22 On: Mon, 28 Sep 2015 07:36:25

Noise of a single electron transistor on a Si3N4 membrane

We have investigated the influence of electron-beam writing on the creation of charge trapping centers which cause 1/f noise in single electron transistors (SET). Two Al/AlOx/Al devices were compared: one where the SET is on a {100} silicon wafer covered by a 120-nm-thick layer of Si3N4, and another one in which the Si was etched away from below the nitride membrane before patterning the SET. The background charge noise was found to be 1 × 10-3e/√Hz at 10 Hz in both devices, independent of the substrate thickness.Peer reviewe

Hakonen, P. J.

Parts, Ü

Aaltodoc

Journal of Applied Physics

P. J. Hakonen

J. M. Ikonen

Ü. Parts

J. S. Penttilä

L. R. Roschier

M. A. Paalanen

Crossref

This is an electronic reprint of the original article.
This reprint may differ from the original in pagination and typographic detail.
Author(s): Hakonen, Pertti J. & Ikonen, J. M. & Parts, U. & Penttilä, J. S. &
Roschier, L. R. & Paalanen, M. A.
Title: Noise of a single electron transistor on a Si3N4 membrane
Year: 1999
Version: Final published version
Please cite the original version:
Hakonen, Pertti J. & Ikonen, J. M. & Parts, U. & Penttilä, J. S. & Roschier, L. R. &
Paalanen, M. A.. 1999. Noise of a single electron transistor on a Si3N4 membrane.
Journal of Applied Physics. Volume 86, Issue 5. 2684-2686. ISSN 0021-8979 (printed).
DOI: 10.1063/1.371110.
Rights: © 1999 AIP Publishing. This article may be downloaded for personal use only. Any other use requires prior
permission of the authors and the American Institute of Physics. The following article appeared in Journal of
Applied Physics, Volume 86, Issue 5 and may be found at
http://scitation.aip.org/content/aip/journal/jap/86/5/10.1063/1.371110.
All material supplied via Aaltodoc is protected by copyright and other intellectual property rights, and
duplication or sale of all or part of any of the repository collections is not permitted, except that material may
be duplicated by you for your research use or educational purposes in electronic or print form. You must
obtain permission for any other use. Electronic or print copies may not be offered, whether for sale or
otherwise to anyone who is not an authorised user.
Powered by TCPDF (www.tcpdf.org)
Noise of a single electron transistor on a Si 3 N 4 membrane
P. J. Hakonen, J. M. Ikonen, Ü. Parts, J. S. Penttilä, L. R. Roschier, and M. A. Paalanen 
 
Citation: Journal of Applied Physics 86, 2684 (1999); doi: 10.1063/1.371110 
View online: http://dx.doi.org/10.1063/1.371110 
View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/86/5?ver=pdfcov 
Published by the AIP Publishing 
 
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Appl. Phys. Lett. 104, 023301 (2014); 10.1063/1.4858935 
 
Low-frequency noise characteristics of HfSiON gate-dielectric metal-oxide-semiconductor-field-effect transistors 
Appl. Phys. Lett. 86, 082102 (2005); 10.1063/1.1866507 
 
Correlation between the 1 ∕ f noise parameters and the effective low-field mobility in Hf O 2 gate dielectric n -
channel metal–oxide–semiconductor field-effect transistors 
Appl. Phys. Lett. 85, 1057 (2004); 10.1063/1.1779967 
 
Low-frequency noise and radiation response of metal-oxide-semiconductor transistors with Al 2 O 3 / SiO x N y /
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 [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
130.233.216.22 On: Mon, 28 Sep 2015 07:36:25
Noise of a single electron transistor on a Si3N4 membrane
P. J. Hakonena), J. M. Ikonen, U¨ . Parts, J. S. Penttila¨ , L. R. Roschier,
and M. A. Paalanen
Low Temperature Laboratory, Helsinki University of Technology, P.O. Box 2200, FIN-02015 Espoo HUT,
Finland
~Received 5 January 1999; accepted for publication 27 May 1999!
We have investigated the influence of electron-beam writing on the creation of charge trapping
centers which cause 1/f noise in single electron transistors ~SET!. Two Al/AlOx /Al devices were
compared: one where the SET is on a $100% silicon wafer covered by a 120-nm-thick layer of Si3N4,
and another one in which the Si was etched away from below the nitride membrane before
patterning the SET. The background charge noise was found to be 131023e/AHz at 10 Hz in both
devices, independent of the substrate thickness. © 1999 American Institute of Physics.
@S0021-8979~99!02517-7#
INTRODUCTION
Single electron transistors ~SET!, as well as other de-
vices based on tunneling of individual electrons, have been
investigated vigorously during the past decade.1,2 One of the
major problems hampering practical applications of such de-
vices has turned out to be the strong, ubiquitous 1/f noise
which easily drives these devices out of their operating
points unless compensative measures are taken. Therefore,
this noise presents a fundamental problem on the operation
and integration of single electron devices.
A lot of effort has been put into understanding the 1/f
noise in single electron transistors. The present picture,
based on several investigations,3–12 indicates that the noise is
caused by trapping centers of charge both in the vicinity of
the island as well as in the tunnel barriers themselves. Some-
times conductance fluctuations in the tunnel barriers
dominate,8 while typically background charge fluctuations on
the substrate are more important, as demonstrated in corre-
lation measurements9 and in detailed studies of trapping state
dynamics.10
We have investigated how much of the 1/f noise in
SETs can be attributed to the lithography phase, i.e., to the
e-beam writing process that is known to cause damage in the
substrate. Is the amount of damage large enough so that it
causes a major fraction of charge trapping states and,
thereby, most of the 1/f noise. To test this hypothesis we
have considered two structures in which the amount of dam-
age in the e-beam writing should differ radically: one where
the SET is on a $100% silicon wafer covered by a 120-nm-
thick layer of Si3N4, and another one in which the Si was
etched away from below the nitride membrane before pat-
terning the SET. By making the substrate thickness small it
is possible to reduce the amount of backward scattering ~sec-
ondary electrons! and, thereby, to minimize the damage in
the e-beam writing process.
As there is evidence that the noise scales with SET
size,7,8 we chose to work with quite large island areas so that
the sensitivity towards substrate defects would be large. We
also chose to work with superconducting samples since the
charge sensitivity is higher but the charge trapping should
not be affected in any way.13 Within our resolution, however,
no contribution can be assigned to the e-beam writing pro-
cess.
SAMPLE FABRICATION
The samples were manufactured using a 375-mm-thick
Si substrate with both sides covered by 120-nm-thick Si3N4
layers. The silicon nitride was grown using low-pressure
chemical vapor deposition which yielded membranes under
considerable tensile stress. Hence, free-standing structures
could be easily constructed.
First, a window of size 600 mm3600 mm was etched to
the back Si3N4 layer using reactive ion etching ~RIE! with
CHF3. A 35 nm layer of chrome, patterned using PMMA
resist and a K3Fe~CH!6-based etching solution, made up the
mask in the RIE step. The final step, the etching through the
Si substrate, was made with 20 mass % KOH solution at
70 °C.14 The etching in KOH took 5 h and provided us with
a free-standing 100 mm3100 mm Si3N4 membrane. A two-
layer resist, made of 250 nm of PMMA/MAA and 100 nm of
PMMA, was then spun on top of the membrane in order to
facilitate regular e-beam lithography. The last step was the
only one in the fabrication of the unetched reference sample.
The SETs were made using a standard two-angle evapo-
ration technique15 with resistive Al evaporation. The geomet-
ric size of the junctions at the ends of a 14031200 nm2 cen-
tral island were 1003100 nm2. The total capacitance of the
SETs was determined from the offset voltage Vb5e/C of the
IV curve at large bias. The etched sample ~E! had a total
capacitance of 1.2 fF while for the unetched sample ~U! we
obtained 1.8 fF. The gate capacitance Cg was determined
from the periodicity of the modulation curves: Cg(E)
510 aF and Cg(U)592 aF. The sum of the tunneling resis-
tances was 400 and 215 kV for samples E and U, respec-
tively.a!Electronic mail: pjh@neuro.hut.fi
JOURNAL OF APPLIED PHYSICS VOLUME 86, NUMBER 5 1 SEPTEMBER 1999
26840021-8979/99/86(5)/2684/3/$15.00 © 1999 American Institute of Physics
 [This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
130.233.216.22 On: Mon, 28 Sep 2015 07:36:25
NOISE MEASUREMENTS
Our experiments on noise covered the frequencies
0.2–50 Hz. The upper limit was set by the RC time constant
of the sample and wiring setup. The lower end was limited
by the temporal stability of the SET operating point. At 0.2
Hz, the duration of the record was about 5 min. The gain of
the SET remained practically unchanged over this period of
time and, thus, a feedback arrangement keeping the operat-
ing point stable was not considered necessary.6 In fact, even
longer measuring periods could have been possible but 0.2
Hz was definitely a safe cutoff.
The noise measurement on sample E was carried out
using an SR830 lock-in amplifier ~Stanford Research Sys-
tems, Sunnyvale, California!. This device has a built-in nu-
merical algorithm to calculate the magnitude of Gaussian
noise. For all measuring frequencies the equivalent noise
bandwidth (1/8t) was taken to be less than 1/5 of the fre-
quency. The measuring time ~the averaging time of the
samples! was proportional to the time constant t of lock-in
by a factor of 10–80. Owing to these conditions, a data
record lasting for 50/f was employed in the measurement at
each frequency f . Reference sample U was measured using a
HP89410 spectrum analyzer.
We followed the procedure outlined by Starmark et al.12
and measured the noise separately using the minimum and
maximum gain of the SET. This ensured that the origin of
the noise can be traced back to the SET itself. Using modu-
lation techniques, we were also able to check that the major
part of the noise in sample U came from background charge
variations and not from 1/f resistance fluctuations.
RESULTS
We made our experiments in the superconducting state
at 150 mK. The advantage of the superconducting state is
that single electron effects can be seen more easily at high
temperatures.4,13 At this temperature, the operating point of
the minimum gain is not too sharp, as seen from the inset in
Fig. 1. In addition, when operating at high temperatures we
avoid problems with self-heating which can be substantial in
certain cases.16 Since previous experiments have not shown
any strong T dependence at the lowest temperatures,5 experi-
ments at T5150 mK were considered sufficient.
Figure 1 illustrates IV curves measured on sample E
using current bias at three different gate charges; the gate
biasing points are denoted by arrows on the modulation
curve shown in the inset. The maximum modulation 70 mV
is somewhat less than the value e/C obtained from the IV
curve offset measurements in the normal state. Since the gain
is almost constant over large variation in the gate charge,
even large background charge fluctuations can be tolerated
without the need of feedback in the noise measurements.
When measuring at minimum gain, the operating point was
checked right before and after the noise scan.
Our results on SET noise are displayed in Fig. 2. The
general shape, showing saturation at the lowest frequencies
and a corner to ;1/f dependence around 1 Hz, agrees with
former experiments ~see, e.g., Refs. 10–12!. The noise is
large, two orders of magnitude larger than the reported value
for the best, stacked construction,8 which reflects the fact that
the island size ~and, consequently, the junction size! was
chosen to be rather large. At 10 Hz, we obtain 3
31023 e/AHz in the superconducting state while in the nor-
mal state the corresponding figure is 231023 e/AHz; after
subtracting the noise at minimum gain we obtain 1
31023 e/AHz in both cases.
The noise over 1–50 Hz was found to be the same for
the etched and unetched samples. Below 1 Hz, however,
there is a slight difference. The corner between constant
noise and 1/f behavior takes place at lower frequencies for
sample U than for sample E. The data have been omitted
from the picture because the gain changed below 1 Hz due to
the ac input filter of the HP89410 spectrum analyzer. The
smaller amount of low-frequency noise in the etched sample
was seen in the IV measurements as well: the curves mea-
sured over 2 min on sample E are much more stable than on
sample U.
DISCUSSION
On the basis of this work, we are inclined to conclude
that the quality of the original substrate is more important
than the minimization of defects produced by the e-beam
FIG. 1. IV curves measured on the SET on a Si3N4 membrane for three gate
charges: ~a! 0, ~b! 0.2e, and ~c! 0.5e. Temperature T5150 mK. The inset
shows the gate modulation of the drain voltage using 0.38 nA bias current.
Arrows denote the locations of the gate biasing points in the IV measure-
ment.
FIG. 2. Charge noise measured on an ‘‘etched’’ (s ,d) and on an ‘‘un-
etched’’ ~-! SET. The filled and open symbols refer to measurements at
minimum and maximum gain, respectively. For the unetched sample, only
data at maximum gain are shown.
2685J. Appl. Phys., Vol. 86, No. 5, 1 September 1999 Hakonen et al.
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130.233.216.22 On: Mon, 28 Sep 2015 07:36:25
writing procedure. In this sense, the recommendation of Ref.
8, viz. that the contact area between the SET and the sub-
strate has to be minimized, sounds reasonable. It is possible
of course that our Si3N4 membranes were not thin enough to
reduce the damage caused by secondary electrons in the writ-
ing process or that etching by KOH induced potassium atoms
into the substrate,17 even though their mobility is rather
limited.18 On the other hand, large stress of the substrates
might play a role and, therefore, it would be interesting to
make similar experiments on nonstoichiometric Si3N4 mem-
branes with less tensile stress.
One way to improve the results might be to etch the SET
structure completely free as has been done with wires and
films.19 Of course, the present design with a loose gate is not
suitable, but a separate back gate could well be used. An
ensuing problem is that reactive ion etching does produce
defects in the aluminum itself, which has been seen clearly
as an increase in the superconducting transition temperature.
ACKNOWLEDGMENTS
The authors are obliged to Sami Franssila ~State Re-
search Center, Espoo! for the Si3N4 coatings. The authors
wish to thank Mikko Kiviranta, Alexander Korotkov, Sami
La¨hteenma¨ki, Heikki Seppa¨, and Alexander Zorin for useful
discussions. This work was financially supported by the
Academy of Finland, by TEKES of Finland via the Nano-
technology program, and by the Human Capital and Mobility
Program ULTI of the European Community.
1 D. V. Averin and K. K. Likharev, in Mesoscopic Phenomena in Solids,
edited by B. Altschuler, P. Lee, and R. Webb ~Elsevier Science, Amster-
dam, 1991!, p. 173.
2 A. N. Korotkov, in Molecular Electronics, edited by J. Jortner and M. A.
Ratner ~Blackwell, Oxford, 1997!, p. 157.
3 G. Zimmerli, T. M. Eiles, R. L. Kautz, and J. M. Martinis, Appl. Phys.
Lett. 61, 237 ~1992!.
4 J. M. Hergenrother, M. T. Tuominen, T. S. Tighe, and M. Tinkham, IEEE
Trans. Appl. Supercond. 3, 1980 ~1993!.
5 D. Song, A. Amar, C. J. Lobb, and F. C. Wellstood, IEEE Trans. Appl.
Supercond. 5, 3086 ~1995!.
6 E. H. Visscher, S. M. Verbrugh, J. Lindeman, P. Hadley, and J. E. Mooij,
Appl. Phys. Lett. 66, 305 ~1995!.
7 S. M. Verbrugh, M. L. Benhamadi, E. H. Visscher, and J. E. Mooij, J.
Appl. Phys. 78, 2830 ~1995!.
8 V. A. Krupenin, D. E. Presnov, M. N. Savvateev, H. Scherer, A. B. Zorin,
and J. Niemeyer, J. Appl. Phys. 84, 3212 ~1998!.
9 A. B. Zorin, F.-J. Ahlers, J. Niemeyer, T. Weimann, H. Wolf, V. A.
Krupenin, and S. V. Lotkhov, Phys. Rev. B 53, 13682 ~1996!.
10 N. M. Zimmerman, J. L. Cobb, and A. F. Clark, Phys. Rev. B 56, 7675
~1997!.
11 A. N. Tavkhelidze and J. Mygind, J. Appl. Phys. 83, 310 ~1998!.
12 B. Starmark, T. Henning, T. Claeson, P. Delsing, and A. N. Korotkov,
cond-mat/9806354.
13 A. N. Korotkov, Appl. Phys. Lett. 69, 2593 ~1996!.
14 See, e.g., M. Madou, Fundamentals of Micromachining ~CRC, Boca Ra-
ton, FL, 1997!.
15 G. J. Dolan, Appl. Phys. Lett. 31, 337 ~1977!.
16 R. L. Kautz, G. Zimmerli, and J. M. Martinis, J. Appl. Phys. 73, 2386
~1993!.
17 TMAH would have been a safer choice for etching as pointed out by the
referee.
18 S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era ~Lattice,
Sunset Beach, CA, 1986! Vol. 1, p. 192.
19 Y. K. Kwong, K. Lin, P. J. Hakonen, J. M. Parpia, and M. Isaacson, J.
Vac. Sci. Technol. B 7, 2020 ~1989!.
2686 J. Appl. Phys., Vol. 86, No. 5, 1 September 1999 Hakonen et al.
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130.233.216.22 On: Mon, 28 Sep 2015 07:36:25


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Noise of a single electron transistor on a Si3N4 membrane

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