This paper presents a CMOS analog front-end for wearable A-mode ultrasound hand gesture recognition. This analog front-end is part of the research into using ultrasound to record and decode muscle signals with the aim of controlling a prosthetic hand as an alternative to surface electromyography. In this paper, the design of a pulser for driving piezoelectric transducers as well as a low-noise amplifier for the received echoes are presented. Simulation results show that the pulser circuit is capable of driving a 137 pF capacitive load with 30 V pulses at a frequency of 1 MHz and dissipates 142.1 mW power. The low-noise amplifier demonstrates a gain of 34 dB and an input-referred noise of 8.58 nV/√Hz at 1 MHz

Demosthenous, A

Jiang, D

Zhang, Y

English

UCL Discovery

XXX-X-XXXX-XXXX-X/XX/$XX.00 ©20XX IEEE Design of a CMOS Analog Front-End for Wearable A-Mode Ultrasound Hand Gesture Recognition Yaohua Zhang, Dai Jiang and Andreas Demosthenous Department of Electronic and Electrical Engineering, University College London, United Kingdom yaohua.zhang@ucl.ac.uk; d.jiang@ucl.ac.uk; a.demosthenous@ucl.ac.uk Abstract—This paper presents a CMOS ultrasound analog front-end for wearable A-mode ultrasound hand gesture recognition. This analog front-end is part of the research into using ultrasound to record and decode muscle signals with the aim of controlling a prosthetic hand in contrast to the conventional method, surface electromyography. In this paper, the design of a pulser for driving piezoelectric transducers as well as a low-noise amplifier for the received echoes are presented. Simulation results show that the pulser circuit is capable of driving a 137 pF capacitive load with 30 V pulses at a frequency of 1 MHz and dissipates 142.1 mW power. The low-noise amplifier demonstrates a gain of 34 dB and an input-referred noise of 8.58 nV/√Hz at 1 MHz.    Keywords—CMOS integrated circuit, hand gesture recognition, human-machine interface, low-noise amplifier, pulser. I. INTRODUCTION  Hand gesture recognition is a crucial area of research in biomedical circuits and systems (human-machine interfaces) with the potential to significantly improve the quality of life in amputees and patients recovering from stroke. In the United States alone, there are an estimated 1.7 million people living with some form of limb loss and 50,000 to 100,000 new amputations take place every year [1], [2]. Out of the number of patients undergoing amputations, approximately 10% are hand/wrist-related [2]. There is an urgent need to mitigate the problems caused by the loss of a hand or the loss of hand functions. Human-machine interfaces, more specifically, wearable hand gesture recognition interfaces offer a promising solution. With advancements in sensor design and signal processing algorithms, it is now possible to record and decode muscular signals into hand gestures and hence, control prosthetic hands [3]. Different sensing modalities have been applied for the control of upper limb prosthetics, for example electrical impedance tomography [4], ultrasound [5] and surface electromyography (sEMG) [6]. Currently, sEMG is the most popular approach for controlling upper-limb prosthetics [3]. sEMG is a non-invasive procedure, in which electrodes are positioned on the skin surface to record the electrical activity of the muscles under test [6]. The electrical activity recorded via sEMG represents the patient’s actual movement intention [7]. Using advanced algorithms, hand movements have been decoded from sEMG signals to an excellent degree of accuracy [7].     Although sEMG has many advantages such as being a safe, cheap, and relatively accurate sensing method, it faces many drawbacks that prevent its universal adoption. For instance, a crucial limitation of sEMG is the noise corruption of the signal being recorded. In addition, sEMG signal integrity depends on external factors such as poor skin contact (sweat and skin hair), electronic interference and motion artifacts [7]. Furthermore, sEMG is incapable of recording deep muscular signals, which means that it is not possible to decode certain minute hand motions such as dexterous finger pinch [7].    Fig. 1. Proposed concept for wearable hand gesture recognition via A-mode ultrasound. Figure adapted from [4] with author’s permission.   Fig. 2. A typical ultrasound system architecture. The pulser and LNA are reported in this paper.   On the other hand, ultrasound is a promising alternative to sense muscular signals for hand gesture recognition. Ultrasound refers to sound waves with frequency greater than 20 kHz and has been extensively applied in biomedical applications. Similar to sEMG, ultrasound is a safe procedure, however, ultrasound is capable of deeper penetration and is able to recognise deep muscular signals. The advantages of using ultrasound in hand gesture recognition over sEMG have prompted research into this area. For instance, A-mode ultrasound has been applied to decode finger motion accurately [8] and estimate muscle contraction force [9].       Currently, research into ultrasound for hand gesture recognition is still in the nascent stage. The recording instrument can be improved significantly. Bulky ultrasound probes and large development boards built using off-the-shelf components are currently used in ultrasound gesture recognition experiments. In order to improve the recording instrument for ultrasound hand gesture recognition, we propose a miniaturised solution in which a wearable bracelet houses the ultrasound transducers distributed at different locations to probe different parts of the forearm as well as the integrated circuits for driving the transducers and decoding the ultrasound signals. In this paper, the analog front-end for the wearable bracelet is reported. To the best of the authors’ knowledge, this is also the first work on an analog front-end for ultrasound hand gesture recognition. The rest of the paper is organised as follows. Section II describes the proposed analog front-end architecture and core circuits, Section III discusses the simulated results and Section IV concludes the paper.  II. ANALOG FRONT-END ARCHITECTURE AND CORE CIRCUITS A. Analog Front-End Architecture A typical ultrasound system architecture is shown in Fig. 2. The system architecture consists of the ultrasound transducers, a transmit (TX) branch and a receive (RX) branch. There are two main types of ultrasound transducers that are widely used, piezoelectric transducers (PZT) and capacitive micromachined ultrasonic transducers (CMUT). PZT has high electroacoustic sensitivity [10] but cannot be integrated with CMOS technology easily, whereas CMUT supports a high bandwidth and CMOS integration but requires a large dc bias for operation [11]. In this work, PZT was selected because it does not need a large dc bias, making it more suitable for a wearable application. A custom 1 MHz PZT transducer was manufactured to be used in this work.    On the TX branch, the TX beamformer circuit is responsible for the desired transmitted ultrasound beam pattern by generating the delay pattern and complex weights [12]. The TX beamformer controls the pulser, which amplifies the TX beamformer signals into several tens of Volt. It is necessary for the pulser to drive the transducer elements with large voltage pulses in order to generate stronger ultrasound waves for greater penetration. On the RX branch, there is typically a transmit/receive (T/R) switch for protection purposes because the RX circuits are constructed with low-voltage transistors and can be easily damaged by the high-voltage TX pulses. The low-noise amplifier (LNA) amplifies the received echoes and feeds into the RX beamformer, which performs a complementary operation to the TX beamformer. Finally, there is an analog-to-digital converter for subsequent digital signal processing. B. Pulser  The pulser circuit drives the PZT with high-voltage, unipolar square pulses (two-level). Note that there are several published designs that employ pulse-shaping in order to reduce the pulser’s power dissipation. Pulse-shaping techniques will be considered at a later stage after its impact on the acoustic performance of the transducer is thoroughly investigated.         In order to generate large pulses, the pulser circuit needs to employ level shifters to shift the low-voltage input signal (typically a square wave signal from 0 V to the digital supply) up to the high-voltage supply. There are two main types of level shifters designed to drive ultrasound transducers, full-swing [13] and floating [14], [15]. In a full-swing level shifter, the circuit shifts the input signal directly up to the high-voltage supply, without the need for an intermediate voltage level. Popular full-swing level shifter topologies are based on cross-coupled pairs [16] and current mirrors [13]. Nevertheless, full-swing level shifters tend to be slower and consume more power than floating level shifters, making them less suitable for this application. In a floating level shifter (Fig. 3(a)), the circuit shifts the input signal up to an intermediate voltage level, without changing the voltage swing of the signal. For instance, in this paper, the floating level shifter (Fig. 3(b)) designed in a 180 nm high-voltage CMOS technology shifts a 0 V to 3.3 V (VDDL) input signal to a 26.7 V (VSSH) to 30 V (VDDH) signal to drive the output PDMOS M2 in Fig. 3(a). The floating level shifter in Fig. 3(b) is based on that proposed in [17] and consists of two complementary branches.   (a)  (b)  Fig. 3. (a) Floating level shifter-based pulser to drive the PZT. (b) Level shifter to drive high side output PDMOS. Thick drain devices refer to high-voltage devices.  Its operation is as follows. When Vin goes high, M1 is turned on, whereas M2 is turned off. With M1 conducting, the source voltage of M3 is pulled down. The source voltage of M3 is connected to an inverter buffer I2, which outputs Vout to high (VDDH). The pair of latching inverters (M5 and M7, M6 and M8) reinforces this by keeping the source voltage of M3 below the switching threshold of I2. Unlike the conventional cross-coupled pair topology [16], the floating level shifter in Fig. 3(b) employs a pair of latching inverters for faster switching. Note that when sizing the latching inverters, it is important to size the PMOS transistor (M5 and M6) to be much stronger than the NMOS transistor (M7 and M8) for the level shifter to switch correctly [17].  The high-voltage devices (indicated with a thicker drain) in the floating level shifter are DMOS devices, capable of supporting a maximum |VDS| of 45 V and a maximum |VGS| of 18 V. The floating level shifter is designed for a 1 MHz operation and is connected to a tapered buffer to drive the output stage PDMOS M2.  C. Low-Noise Amplifier  The low-noise amplifier (LNA) amplifies the received ultrasound echoes, which are very weak signals for the subsequent ADC to process. The LNA has been designed as current [18], transconductance [19] and transimpedance amplifiers [20] for ultrasound applications. For our custom-made PZT transducer, it exhibits a relatively small impedance   Fig. 4. Folded cascode amplifier.   of 2 kΩ at 1 MHz. Given this relatively small transducer impedance, it is a good idea to design a voltage amplifier whose input impedance can easily be over ten times larger than 2 kΩ in order to read out a signal with minimal attenuation due to loading.  Both differential and single-ended voltage amplifiers have been designed for ultrasound applications. Differential amplifiers have the benefits of lower harmonic distortion and power supply rejection and can be more suited for ultrasound applications that demand low harmonic distortion such as tissue harmonic imaging [21].  However, in this design, a single-ended implementation has been chosen because the simulation results show that the noise and power performance of the single-ended amplifier is acceptable. Furthermore, harmonic distortion and power supply rejection are not the critical specifications in this application. A differential design is also more expensive than a single-ended design in terms of area. The core voltage amplifier is shown in Fig. 4. The core amplifier is a classic folded-cascode op-amp that is used with a resistive feedback network. In contrast to published designs that incorporate time-gain compensation in the amplifier, in our design, we have decided to design a fixed gain amplifier and perform the time-gain compensation via signal processing algorithms after digitisation. This will help to reduce the design complexity of the amplifier significantly.   III.  SIMULATION RESULTS The pulser circuit drives a 137 pF transducer load with a voltage swing of 30 V and frequency of 1 MHz. Careful sizing has been applied to arrive at a good compromise between the power dissipation and the speed (rise/fall times). The pulser circuit dissipates a power of 142.1 mW and has a rise time and fall time of 98.5 ns and 85.36 ns respectively. The voltage waveforms of the pulser are shown in Fig. 5. The voltage amplifier achieves a gain of 34 dB and a bandwidth of 1.2 MHz and an input-referred noise of 8.58 nV/√Hz . The gain plot of the low-noise amplifier is shown in Fig. 6.    Fig. 5. Pulser input and output voltage waveforms.    Fig. 6. Gain plot.   The performance of the proposed circuit is summarised in Table I. Given that designing a CMOS ultrasound transceiver for hand gesture recognition is a novel application, there have not been many designs published in the literature that can be compared. Instead, Table I shows a comparison with the state-  TABLE I.  COMPARISON WITH STATE-OF-THE-ART DESIGNS  This work (simulation) [20] [22] [23] CMOS Process 180 nm HV 180 nm HV   180 nm  180 nm  Pulser output voltage 30 V 30 V 15 V 13.2 V Frequency 1 MHz 3.3 MHz 2.6 MHz 5 MHz Pulser power 142.1 mW 52.4 mW - 12.8 mW Rise/fall time 98.5/85.36 ns - 57/30 ns - Load 137 pF 40 pF // 80 kΩ >12 pF BVDa LNA gain 34 dB 96.6 dBΩ 95.1 dBΩ 52 dB LNA BW 1.2 MHz 5.2 MHz 12 MHz 13 MHz LNA power 1.030 mW  14.3 mW (active power) 0.382 mW @ 1.1 V (simulated) 0.95 mW LNA input-referred noise 8.58 𝑛𝑉/√Hz @ 1 MHz 0.56 mPa/√Hz  @ 3 MHz 3.5 pA/√Hz  @ 2.6 MHz 19.3 nV/√Hz  @ 5 MHz a. Butterworth- Van Dyke model (3.87 kΩ + 0.68 mH + 1.93 pF) // 25.2 pF  of-the-art ultrasound integrated circuits designed for imaging purposes. From Table I, the power and noise performance of the low-noise amplifier are comparable to the state-of-the-art. On the other hand, the pulser’s power dissipation is higher given that it drives a much more capacitive load. Nevertheless, the pulser’s power dissipation (142.1 mW) is very close to the theoretical fCV2 lower bound (123.3 mW). IV. CONCLUSION A CMOS ultrasound analog front-end for wearable hand gesture recognition has been presented. The motivation of this work, i.e. the advantages of using ultrasound as a sensing modality for wearable hand gesture recognition compared to sEMG has been discussed. The general system architecture for such an analog front-end has also been explained. The pulser and low-noise amplifier circuits have been analysed and elaborated in detail. Future work would involve designing the beamformer modules developing the complete chip for tape-out, acoustic experiments, coding the signal processing algorithms for ultrasound feature extraction and training a neural network for the prosthetic hand control. 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Design of a CMOS Analog Front-End for Wearable A-Mode Ultrasound Hand Gesture Recognition

https://discovery.ucl.ac.uk/10154614/1/Demosthenous_Design%20of%20a%20CMOS%20Analog%20Front-End%20for%20Wearable%20A-Mode%20Ultrasound%20Hand%20Gesture%20Recognition_AAM.pdf

Design of a CMOS Analog Front-End for Wearable A-Mode Ultrasound Hand Gesture Recognition

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