'Institute of Electrical and Electronics Engineers (IEEE)'
Abstract
This paper presents the design of an integrated circuit (IC) for (i) galvanostatic deposition of sensor layers on the on-chip pads, which serve as the sensor's base layer, and (ii) amperometric readout of electrochemical sensors. The system consists of three main circuit blocks: the electrochemical cell including a 4×4 electrode array, two Beta-multiplier based current generators and one pA-size current generator for galvanostatic electrodeposition, and a switch-capacitor based amperometric readout circuit for sensor current measurement. The circuits are designed and simulated in a 180-nm CMOS process. The three current reference circuits generate a stable current from 7.2 pA to 88 µA with low process, power supply voltage and temperature (PVT) sensitivity. The pA-size current generator has a temperature coefficient of 517.8 ppm/°C on average (across corners) in the range of 0 to 60°C. The line regulation is 4.4 %/V over a supply voltage range of 0.8-3 V. The feasibility of galvanostatic deposition on on-chip pads is validated by applying a fixed current of 300 nA to electrochemically deposit a gold layer on top of electrodes with nickel/zinc as the adhesive layer for gold. Successful deposition of gold was confirmed using optical microscope images of the on-chip electrodes
