The Level-1 Calorimeter Trigger is a digital pipelined system, reducing the 40 MHz bunch-crossing rate down to 75 kHz. It consists of a Preprocessor, a Cluster Processor (CP), and a Jet/Energy-sum Processor (JEP). The CP and JEP receive digitised trigger-tower data from the Preprocessor and produce electron/photon, tau, and jet trigger multiplicities, total and missing transverse energies, and Region-of-Interest (RoI) information. Data are read out to the data acquisition (DAQ) system to monitor the trigger by using readout driver modules (ROD). A dedicated backplane has been designed to cope with the demanding requirements of the CP and JEP sub-systems. A number of pre-production boards were manufactured in order to fully populate a crate and test the robustness of the design on a large scale. Dedicated test modules to emulate digitised calorimeter signals have been used. All modules, cables and backplanes on test are final versions for use at the LHC. This test rig represents up to one third of the Level-1 digital processor system. Real-time data between modules were processed and time-slice readout data was transferred to the ROD at a trigger rate up to 100 kHz. Intensive testing consisted of checking the readout data by comparing to hardware simulations of the trigger. Domains of validity of the boards were also measured and dedicated stressful data patterns were used to check the reliability of the system. Tests results have been successful and the Level-1 calorimeter trigger system is proceeding to full production
