Field–programmable analog arrays (FPAAs) provide a method for rapidly prototyping analog systems. Currently available commercial and academic FPAAs are typically based on operational amplifiers (or other similar analog primitives) with only a few computational elements per chip. While their specific architectures vary, their small sizes and often restrictive interconnect designs leave current FPAAs limited in functionality, flexibility, and usefulness. In this paper, we explore the use of floating–gate devices as the core programmable element in a signal processing FPAA. A generic FPAA architecture is presented that offers increased functionality and flexibility in realizing analog systems. In addition, the computational analog elements are shown to be widely and accurately programmable while remaining small in area. 1. LOW–POWER SIGNAL PROCESSING The future of FPAAs lie in their ability to speed the implementatio
