Abstract   A very fast monolithic charge sensitive preamplifier using HF2CMOS technology featuring less than 45mW power dissipation for a 5V maximum output voltage swing, with a slew rate about 700V/μsec for 150pF input capacitance (≈ 7nsec rise time), has been realized.  A front-end set up for the read out of more detectors and the shaping of the signal with a 20nsec RC-CR filter employing only monolithic preamplifiers is described and tested. The measured value of ENC (Electronic Noise Charge) for the arrangement with 150pF input capacitance is 17keRMS.  The preamplifier meets the requirements for silicon calorimetry application for experiments at the hadron colliders SSC/LHC

Alberto Gola

G. Pessina

G. Terzi

P. G. Rancoita

English

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Nuclear Physics B (Proc. Suppl.) 23A (1991) 207-213North-HollandMONOLITHIC READ-OUT ELECTRONICS FOR TSILICON CALORIMETERS AT SSC/LHC COLLII3ERSA. Gola*, G. Pessina+, P.G. Rancoita+ and G. Terzi~* SGS THOMSON Microelectronics, Via Tolomeo 1, 20010 Cornaredo(MI) Italy,+ INFN Istituto Nazionale di Fisica Nucleare Via Celoria 16, 20133 Milano, ItalyA very fast monolithic charge sensitive preamplifier using HF2CMOStechnology featuring less than 45mW power dissipation for a 5V maximum output voltage swing, with a slew rate about 700Y/~csecfor 150pF input capacitance (~ 7nsec rise time), has been real-ized .A front-end set up for the read out of more detectors and the shap-ing of the signal with a 20nsec RC-CR filter employing only monoli-thic preamplifiers is described and tested. The measured value of ENC(Electronic Noise Charge) for the arrangement with 150pF input capacitance is 17keRMSThe preamplifier meets the requirements for silicon calorimetey application for experiments at the hadron colliders SSC/LHC.1 . INTRODUCTIONNew generation hadron colliders such asthe super conducting supercollider (SSC inTexas) and the large hadron collider (LHCat CERN), which will yield multiTeV pro-ton beams, are expected to be built in the1990s. The calorimeter of the central detec-tion system will have to withstand the se-vere experimental conditions of those collid-ers : very high luminosity and high multiplic-ities . Therefore, it is required to have the fol-lowing features : compact construction, finesegmentation, flexibility, fast charge collec-tion, good energy resolution, ability to sat-isfy the conpensation condition (e/~c = 1),easy calibration, and good radiation hard-ness .A silicon calorimeter with silicon as activemediums_3 is able to fulfil the above men-tioned requirements .0920-5632/91/S03 .b0 © 1991 ® Plsevier Science Publishers n.V . (North-Holland)2 . READOUT APPROCHThe new machines at SSC/LHC experimeets have as main features a very high num-ber of channels and a high counting rate ofthe incoming events. The design for the read-out is in this respect more complicated, notonly speed and noise of the preamplifiers areto be taken into account, but also power dis-sipation and occupation area are as impor-tant as the former two.The parasitic capacitance shunting the de-tector (capacitance in the range of 100 .-200pF), has to be kept low, otherwise itcan affect the resolution considerably. Forthis reason the preamplifiers have to be 1o-Gated close to the detector. Since the num-ber of channel is very large, every preampli-fier must oc;cupy a small area in order to sat-isfy this constraint. With such an arrange-ment, the total power dissipation has to beA, Cola et al./Rionodithic read-out electronics for the silicon calorimeters at SSC/LHC colliderskept low enough to avoid excessive heat-ing of the calorimeter . Since the noise andthe speed of the preamplifier improve with in-creasing power dissipation, a compromise be-tween thse variables must be found in or-der to get a suitable solution .The counting rate of the incoming eventsin a SSC/LHC collider experiment is about50MHz, so that the shaping time of thepreamplifier output signal must be very short .Because of the very short shaping time, the se-ries noise of the preamplifier is the mainsource of noise which affect the resolution.The source of the series noise can be reducedby employing a bipolar devices as the inputstage of the preamplifier, since this transis-tor has a large transconductance~ . It also per-mits the use of high speed monolithic tech-nology, which enables a minimum occupyLion area, with high capacitive matching whenusing bipolar transistor, like in our experi-mental application . While, in the low de-tector capacitance region and large shap-ing time, the JFET-CMOS technology givesalso good performances5 .The dynamic range of the preamplifier out-put must be large, because of the rangeof the energy deposited in the silicon de-tector (0.1 to 500MeV), so that linearityand speed characteristics have to be main-tained for both small and large signals . Anew process of bipolar-CMOS mixed technol-ogy, called HF2CMOS, developed by SGS-THOMSON Microelectronics, is able to sat-isfy the required specifications because of thevery small dimensions of the integrated tran-sistors and the 1Qw r~a.~rasitic capacitance in-side the monolithic chip .3. TECHNOLOGYThe availability of mixed technology com-bining very high speed bipolar transistor withgum CMOS, allows to design a high speed,very high slew rate monolithic charge sensi-tive preamplifier .By using this technology, named HF2CMOS, it is possible to implement on thesame silicon chip both bipolar transistor (npn,lateral pnp, vertical pnp, isolated collectorvertical pnp) and CMOS devices well suitedfor both analog and digital applications .The compactness due to the reduced spaceoccupied by the basic structures and to atriple interconnecting level permits the imple-mentation of extremelly complex systems in-cluding high precision analog circuits and alarge number of logic functions (3000 MOStransistor~mm2) .The CMOS is a p-well on an n epitaxiallayer, with silicon gate and a minimum chan-nel length of gum, as represented in fig.l,where a p-channel and an n-channel transistorcan be seen . The p-channel is grown directlyon the epitaxial layer, while the n-channel de-vice is realized on a p-well layer which is com-mon to the top-bottom isolation zone . In thesame picture, the classical npn bipolar tran-sistor, is also presented . In fig.l, the deep n+collector diffusion, the p base and n+ emit-ter steps are shown.RROD	tROD RPRE" "ELL w-ent- DDesttatDP- R.M-CPI PFig.lCross section of transistors in the processHF2CMOS.In the ci.esign . o~ the charge preamplifiera p-type element is necessary for level shift-ing purpose. In this application, were a highslew rate is needed, his choice has the con-straint of a low output capacitance . This lim-its the use of a p-MOS transistor rather thana pnp bipolar transistor due to the relativelyhigh collector parasitic capacitance of the lat-ter ones.The main features of the basic componentsused to realize the charge sensitive preampli-fier, are a current gain, hFE ~ 100 and a tran-sition frequency, fT > 4GHz (fig.2), for thenpn transistor and 5~um channel length forthe p-MOS transistor (in order to have suit-able current capability) .A. Go1a et al./Monolithic read-out electronics for the silicon calorimeters at SSC/LHC collidesFig.2fT - le plot of the IfF2CMOS npn transis-tor with 356~m2 area .To design a radiation hard device for newcollides experiments bipolar npn, p-channeland n-channel MOS transistor were irradi-ated, with a dose of 1 .2 1012 neutr/cm2.The characterisics of such devices (avail-able as individual structures), performed be-fore and after irradiation, show that no sig-nificant change occured in the performanceof npn and MOS transistors, since the dam-age in bipolar transistors is proportional tothe inverse of the transition frequency wT,which is very large in the npn transistorsof HF2CMOS process. MOS devices, espe-cially p-MOS, are neutron radiation hard de-vices for their intrinsic structure .4. CIRCUITS DESCRIPTIONA fast and high slew rate amplifier haslow power consumption, if the transistors em-ployed reach large values of their t ilionangular frequency wT at low standing cur-rent, and very low input and output capa~itances. This occurs because wT is proportional to the biasing current and inversely pro-portional to the input capacitance, and theslew rate creases with the decrease of the carpacitance shunting the high impedance nodes .Fig.3 shows the used configuration . Q~is the input transistor whose dimensions de-pend upon the matching with the detector carpacitance . QZ is the p-MOS transistor thatcascodes Q1, and is loaded with the cur-rent generator Q4. Finally Q3 is the out-put buffer, where the capacitive feedback isclosed.Fig.3Charge sensitive preamplifier using a bipo-las npn input transistor and a p-MOS cas-code transistor.The high speed in this amplifier is ob-~10 A. (cola et al./monolithic read-out electronics for the silicon calorimeters at SSC/LHC colliderstwined, since Q1 has a very high transition fre-quency wt low standing current (fig.2) and QZhas a little gate length . The high slew ratestems from the low value of the capacitanceshunting the high impedance node at the Q~drain, as Q~ and Q~ have very small di-mensions with, consequently, a negligible out-put parasitic capacitance .In fig.3 the bia:m~ng network of the pream-plifier is also shown. The resistor RP, exter-nal to the chip, sets the biasing current Ip forQs. Since Q~, Qs and Qs are equal, the ratios of resistors Rs and Rs to R4 estab-lish the biasing current of QZ and Q7 . By set-ting Q7 = Qz it is easy to show that cur-rent Ii is given by the ratio of resistors Rz andRi. For Rs = R5 = R4/10 and R2 = 3081,the biasing current of QZ and Q4 is only 4% ofthe biasing current of Q1 . In this way, by set-ting a very little reference current throughRp, it is possible to set up the working pointsof the whole circuit . All the components, ex-cept Rp, are on the same chip . A high ac-curacy is obtained with this arrangement,since ratios of the components on the monoli-thic chip, have a precision of better than 1%.In order to get the best compromise be-tween speed, noise and power dissipationin the actual experimental setup, the bias-ing of the preamplifier can be thus modi-fied (by means of Rp) .As will seen later, it is advantageous tohave more amplifiers on a single integratedcircuit . In this respect only one biasing net-work consisting of Qs, Qs, Q7, R2, R4 ,RS and Rp is needed for every chip, sav-ing in occupation area and current consump-tion .A first integrated circuit version of thepreamplifier has been realized$ . With 3mAstanding current for Q1 the measured slewrate is larger than 700V/~csec . In fig.4, a 5Vpreamplifier output voltage swing is shown,as a response to a simulated 312.5Me in-put charge corresponding to 1 .125GeV par-ticle energy. The feedback capacitance islOpF, the preamplifier input capacitance is150pF, simulating the detector impedance .The high speed required by the high rate ofthe incoming events is, therefore, well sat-isfied . With this bias condition and out-put range the power dissipation is less than45mW .l .00 V/div	l0 .0 ns/divFig.45V output voltage swing for the monoli-thic preamplifier. The slew rate is about700V/~usec.5 . FRONT-END SET UPThe realized integrated preamplifier satis-fies the dynamic requirements imposed by thefuture experiments at SSC/LHC machines .In the new version we are going to developthe matching with the detector impedanceand the shaping of the signal will be imple-mented on a single chip .In8 the analysis of the matching condi-tion has shown that with an input transistor50 times larger than that now used it is pos-sible to meet the typical actual detector capacitance of 150pF mantaining the same dy-namic and static characteristic .The calorimeter cell is composed of stacksA. Gola et al./Monolithic read-out electronics for the silicon calorimeters at SSC/L8C co~idersof 4 detectors having about 150pF capaci-tance each as proposed in the silicon calorime-ter conceptual design for SSCZ . Only one signal from every stack is necessary to recon-struct the electromagnetic or hadronic sho-wer. Two solutions are available : to con-nect in parallel the detectors (600pF of to-tal capacitance) and then to read the signal with a preamplifier or to read the signal from every detector with a preampli-fier making the sum of all preamplifier out-puts .The two solutions can be implemented asindicated in fig.5 .Fig.5Front-end set up for the read out : the de-tectors signal in the stack are added and filtered by a RC-CR shaper at 20nsec peak-ing time . Every preamplifier is monolithic.Suppose the stack is split into N detec-tors (N > 1); every detector signal is read bya preamplifier, whose output voltage is con-verted in a current by the QA's transis-tors and then added to each other. The re-sultant current is converted again to a volt-age with the same polarity of the input pream-plifier, by the output amplifier, where a loopnetwork acts as a RC-CR shaper . All the am-plifiers employed are of the same kind as infig.3, the output amplifier, having as anal stage a Darlington, in order to drive acoaxial cable terminated at its ending point .By putting rM = RBCB =	~c the output voltage of the shaper is given byg:Vo(S)= srm ~ Q= .(1)(1 ;- SrM)~ i= ~ SCfThe whole arrangement is to be monolithtally integrated. A printed board has bin re-alized (fig.6 shows the output signal of thewhole circuit when r~ = 20r~sec) .40.0 ®V/div ~.0 ns/divrp p~nauENC(eRMS) =ezp(1)2q2rM1/2M 2+ T ( 2D +ZB +Zf)2 NFlg.ôOutput signal of the network of fig.5 . Thepeaking time is at 20nsec.The resolution in ENC (Electronic NoiseCharge) of the above acquisition chain is givenby (in RMS electron) :(~ + Cf + CB) ZeT + (NZ + Cf)ZeBB'Mere, C~ is the preamplifier input capaci-tance, while CDT is the stack detector capacitance, N is the number parts in whichthe stack is divided" e~. = 4KT0.5lg n ande~ ~ = 4KTRBB" are, respectively, the col-léc®r and the base spreading resistance ther-mal series noise of the input device; the par-allel noise is contributed by the shot noiseof the detector an.~ of the input current ofthe preamplifier ($v($B) = 2gID(B)), and thethermal noise of the feedback resistor (~f =4KT%Rf). r~ is the shaping time of the filter.Ey varying the input capacitance CDTwhen N = 1 it is possible to evaluate the se-ries input noise from the slope of ENC ver-sus CDT plot of fig.7 " Taking into accountthat ga = 115mA~V, if the input devicestanding current is 3mA and rM = 20nsec,one can extract for RBB" a value less than370EI for the realized preamplifier .A. C*oia et al,/Rionolithic read-out electronics for the silicon calorimeters at SSC/LHC collidersFig.7Measured ENC(eRwts) as a function of the in-put capacitance CDT with the RC-CR fil-ter of fig.5 at 20nsec .This corresponds to a resolution of 17keRMsat CD = 150pF: Future version will ob-tain RBB~ .~ ?SZ which means 4keRMS res-olution with the same condition "It can be seen in eq.(2) that the splitof the stack has an optimum value NopTsince for N » 0 or N -~ 0 the resolu-tion gets larger and larger values. By differ-entiating eq "(2) in respect to N the result-ing NOpT is :NOPT =1	1/2Z~_(eT+ eBB'1CDTs)~eT+CteaB' r 2 2+ ~(a + Z )(Cf ~-C2rM 2 B findependent of the detector leakage currentEq.(3) has an interesting physical interpre-tation : NOpT fulfill the condition in whichthe whole preamplifier noise, asymptotic toN in eq.(2), equals the series noise, asymp-totic to 1/N in eq.(2) .For the new version of the preamplifiereq,(3) gives a NOpT so that the stack must besplit into 4 detectors having 150pF eâch one(CB = 19pF, IB = 30~uA and Rf = 100kSZ) "These were found for a design which must takeinto account mathing with 150pF. The reso-lution is 44% better than the read out witha single preamplifier with the same features,namely ENC = 8keRMS for the whole stack.If an evaluation of the matching of a sin-gle preamplifier to a detector of 600pF capac-itance be made, the result should be very sim-ilar (less than 4% difference) to that ob-tained above both for the resolution andpower dissipation . This is important becausethe above arrangement which we intend to de-velop is easier to realize from the technologi-cal point of view .For the actual version of the preampli-fier ENC ~ 32keRMSFinally, we observe that the use of a smallshaping time is advantageous for the paral-lel noise of the detector leakage current . Infact, the contribution to ENC given only byA. Gola et a1./Monolithic read-out electronics for the silicon calorimeters at SSC/LHCcollidersID, rises only at large values of current if TMis as low as 20nsec. As an example a contri-bution to ENC of 15keRNts is given by a leak-age current of 1mA, which is out of the rangeof the detectors employed.6. CONCLUSIONSA very fast monolithic charge sensitivepreamplifier, using HF2CMOS technology,has been realized .The overall power consumption is less than45 mW for a 5V maximum output voltageswing, with a slew rate of about 700V~~sec for150pF input capacitance (~ 7nsec rise timefor 5V output swing) .A new acquisition chain where signal, de-livered from several detectors, are summedand an RC-CR shaping of 20nsec is used isrealized, employing monolithic preamplifieronly. It was succesfully tested in view of fu-ture experimental application . This way, themeasured value of ENC for a 150gF detec-tor capacitance is 17keRMSIn the next monolithic version the wholenetwork will be integrated, and the input de-vice will have an area of 50 times larger thanthe present one in order to reduce the ENC toabout 4keRNts under the same static and dy-namic conditions .The preamplifier meets the requirementsfor silicon calorirt~etry applications for exper-iments at the hadron colliders SSC/LHC.ACKNOWLEDGEMENTSThe authors are indebted to A. Seidman(Tel-Aviv University) for reading the manu-script and to E. Borchi (University of Flo-rence) for his assistance in the radiation test .We thank S . Latorre (INFN) for the es-sential technical support, R. Benedet (INFN)for the help in the graphic presentation andM. Leone (SGS-THOMSON) for the monoli-thic layout.REFERENCES1.	S. Kirkby et al., Report of the coax d~tector subgroup, in: ProcWorkshop on Experiments, D rs dExperimental Areas for the Super Cn ' er,Berkeley (July 7-1?, 1957) ; . R, Dan-aldson and M.G.D. Gilchri~e (World S_ c_ _i-entific Publishing, Singapore 1 ), p.E. Borchi et al., (SICAPO co rartion, Nucl . Inst . and Meth. Phys.279A (1989), 57.2. C. Bertrand et al., Silicon c~lorünetry forthe SSC, in: Proceedings of the ' ork-shop on Calorimetry for New Supercolliders, Eds. R. Donaldsson and M.G. D.Gilchriese (Tuscoolosa ~USA),13-17 March1989 World Scientific, ingapore~, p. 489.21~3. Expression of Interest ofthe Superconduct-ing Super Collider Laboratory by the LCollaboration.4. E. Gatti and P.F. Manfredi, Nucl. In-strum. Methods Phys. Res. 226A (1984)142.5 . W. Buttler, V. Liberali, et all ., Nucl . In-strum. Methods Phys. Res. 279A (1989)204.6. R.S. Mullen and- T.I. Kamins, Devices Electronics for Integrated Circuits (John Wiley and Sons, New York, 1977) .7. G.C. Messenger and M.S. Ash, The Ef-fects of Radiation on Electronics Systems(Van Nostrand Reinhold company, NewYork 1986 .8. A. Gola, G. Pessina and P.G. Rancoita,Nucl. Instrum . Methods Phys. Res. 292A(1990) 648.

Monolithic read-out electronics for the silicon calorimeters at SSC/LHC colliders

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Monolithic read-out electronics for the silicon calorimeters at SSC/LHC colliders

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