This paper gives a proposal about a new parallel architecture composed of many vector processors, and being especially designed for number-crunching simulation problems in engineering and science. This computer is elaborated to systematize up-to-date supercomputer units (vector processors) in a united parallel machine of the SIMD type. It also aims to reduce hardware quantity of communication network among so many processors as in ADENA Ⅰ and Ⅱ, proposed previously by the author
