Gunaydin, Yasin

Jahdi, Saeed

English

The short circuit evaluation of the GaN and SiC cascode devices is characterized in this paper. The effects of three different parameters, gate resistors, DC-link voltages and temperature on the short circuit have been analyzed and discussed. Since the short circuit incapability of 650 V GaN cascode device, most of the parameters are decreased as much as possible. On the other hand, 650 V SiC power cascode device shows the highest short circuit current and energy in comparison with high rated GaN and SiC power cascode devices under various conditions

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                          Gunaydin, Y., & Jahdi, S. (2023). Experimental Analysis of ShortCircuit Robustness of GaN and SiC Cascode Devices. In PCIMEurope 2023: International Exhibition and Conference for PowerElectronics, Intelligent Motion, Renewable Energy and EnergyManagement (pp. 2653-2658). VDE Verlag.https://doi.org/10.30420/566091366Peer reviewed versionLink to published version (if available):10.30420/566091366Link to publication record in Explore Bristol ResearchPDF-documentThis is the accepted author manuscript (AAM). The final published version (version of record) is available onlinevia VDE at https://doi.org/10.30420/566091366. Please refer to any applicable terms of use of the publisher.University of Bristol - Explore Bristol ResearchGeneral rightsThis document is made available in accordance with publisher policies. Please cite only thepublished version using the reference above. Full terms of use are available:http://www.bristol.ac.uk/red/research-policy/pure/user-guides/ebr-terms/Experimental Analysis of Short Circuit Robustness of GaN and SiCCascode DevicesYasin Gunaydin1, Saeed Jahdi1, Xibo Yuan1, Chengjun Shen1, Mana Hosseinzadelish1, RenzeYu1, Olayiwola Alatise2, Jose Ortiz Gonzalez21 University of Bristol, Bristol, UK2 University of Warwick, Coventry, UKCorresponding author: Yasin Gunaydin, yasin.gunaydin@bristol.ac.ukSpeaker: Renze Yu, renze.yu@bristol.ac.ukAbstractThe short circuit evaluation of the GaN and SiC cascode devices is characterized in this paper. The effectsof three different parameters, gate resistors, DC-link voltages and temperature on the short circuit havebeen analyzed and discussed. Since the short circuit incapability of 650 V GaN cascode device, most ofthe parameters are decreased as much as possible. On the other hand, 650 V SiC power cascode deviceshows the highest short circuit current and energy in comparison with high rated GaN and SiC powercascode devices under various conditions.1 IntroductionThe gallium nitride (GaN) and silicon carbide (SiC)have become the most promising materials com-pared to conventional silicon (Si) material for powersemiconductor devices due to their predominantfeatures, containing of lower on state resistance,the higher saturation velocity and larger critical elec-tric field concluding the high speed switching perfor-mance and high power density [1], [2]. One of themost significant parameter to asses the reliabilityof these devices is their capability for withstandingthe short circuit state that could cause thermal andmechanical stress on the device. This test can beset with the single pulse. Regarding the oxide thick-ness of the SiC MOSFET, it is smaller than that ofthe conventional Si MOSFET. This can cause the in-crease of the sensitivity of the electron tunneling inthe gate-oxide layer. The tunneling is the one of thereliability concern in SiC MOSFETs [3], [4]. Shortcircuit current may increase this tunneling impactin SiC MOSFETs [5]. The SiC cascode devicesdiffer from the SiC MOSFETs with Si MOSFET as agate, therefore SiC cascode device has advantagewith the absence of the gate oxide layer in terms ofthe device reliability [6], [7]. In this paper, the shortcircuit capability of the GaN and SiC cascode de-vices have been tested and compared each otherunder various conditions, such as temperature gateresistors and DC-link voltage levels.2 Experimental ResultsThe short circuit test is set up to understandthe functioning and robustness of 650 V GaN(TPH3212PS), 650 V SiC (UJ3C065080T3S),900 V GaN (TP90H180PS) and 1200 V SiC(UJ3C120150K3S) cascode devices as illustratedin Fig. 1 with the test rig that is used in the exper-iments. The effect of the three parameters havebeen analyzed on the short circuit current of thepower devices, such as DC-link voltage level, tem-perature and gate resistor. The DC-link voltage isincreased from 10 V to 30 V, in steps of 10 V for1 µs period to see the impact on the short circuitcurrents of the SiC and GaN cascode devices atroom and high temperature as well as two differentgate resistors 10 Ω and 100 Ω are used in the ex-periments to investigate the influence on the shortcircuit currents of the cascode power devices.2.1 The impact of the gate resistors onthe short circuit currentsTo analyze the effect of the gate resistors on theshort circuit ruggedness of the four cascode de-vices, 10 Ω and 100 Ω gate resistors are used anddrain currents and gate voltages of the cascodedevices under 10 V DC-link voltage at room tem-Fig. 1: The schematic of the short circuit test for cas-code devices and test rig that is used in experi-mental measurements.perature are shown in Fig. 2 and Fig. 3. As it isseen in the figures, the decreasing the gate cur-rent, slower the switching of all four devices andthis can be clearly seen in the 650 V GaN cascodedevices which has the smallest input capacitancescompared to other devices that results in that thisdevice has the highest short circuit current undersame condition. As it is clearly seen in all plots, theturn off transients of the cascode shows great oscil-lations this might cause the failure of the 650 V GaNcascode devices since its fast switching rate leadsthe larger stray inductance through the cascodeconfiguration and this results in the ruggednessfailure of the HEMT [8].For establish a precise comparison between thecascode devices, the drain currents of all cascodedevices are combined and illustrated in Fig. 4. The650 V GaN device is directly failed after applying10 V DC link voltage for the short circuit with 10 Ωand 100 Ω gate resistors, therefore it could not betested under the higher short circuit stresses withhigher DC-link voltage and high temperature. Asit is seen, the only difference can be seen in thedrain current trends of the 650 V GaN with 10 Ωand 100 Ω, it results in the peak current of nearlyFig. 2: The short circuit currents of the 650 V SiC, 650 VGaN, 1200 V SiC and 900 V GaN cascode de-vices with different gate resistors under 10 VDC-link voltage at 25°C.Fig. 3: The gate voltages of the 650 V SiC, 650 V GaN,1200 V SiC and 900 V GaN cascode deviceswith different gate resistors under 10 V DC-linkvoltage at 25°C.48 A, then the device is failed.The short circuit stress level is increased by riseof the DC-link voltage to 30 V as well as tempera-ture is risen to 175°C to observe the impact of thegate resistors on the short circuit currents and gatevoltages of the 650 V SiC, 900 V GaN and 1200 VSiC cascode devices under high DC-link voltage athigh temperature. The results are demonstrated inFig. 5. Concerning the drain currents of the cas-code devices under 30 V DC-link voltage at 175°C,it is unvarying for the 650 V SiC cascode with largergate resistor, whereas it is increasing for the 900 VGaN cascode device and decreasing for the 1200 VSiC cascode device with higher gate resistor. Theincrease of the short circuit current with increasingthe gate resistor for GaN cascode can be related tothat the increase of the resistor can lead increasegate source voltage that causes the increase of theon state resistance and higher current density inthe device. With respect to short circuit current ofSiC cascode device, its decrease with increasingFig. 4: The short circuit currents of the four cascodedevices with 10 Ω and 100 Ω gate resistors under10 V DC-link voltage at 25°C.gate resistor can be associated with that increasinggate resistor slow down the device switching andcauses the delay that leads the decrease of thecurrent rise rate and short circuit current peak.The short circuit currents of the all three cascodedevices are integrated and shown in Fig. 6 to makea clear comparison between them under DC-linkof 30 V with two different gate resistors at hightemperature. Regarding to current level, it is highfor the 650 V SiC with both gate resistor comparedto high rated cascode devices,while it is higher forthe 900 V GaN with 10 Ω gate resistor than the1200 V SiC and it is vice versa with 100 Ω gateresistor. The 650 V SiC encounters larger shortcircuit current, since the power dissipation in thisdevice is much larger than high rated counterparts.The short circuit energy of the low rated and highrated cascode devices has been calculated under10 V DC-link voltage at room temperature for bothgate resistors and illustrated in Fig. 7. It is clearlyseen that the low rated cascode devices have beenfaced larger short circuit energy compared to highrated cascode devices, particularly with low gateresistor around 100 mj. However, the 650 V GaN isnot durable to overcome higher short circuit energy.In addition to this the voltage and temperature areincreased, then the short circuit energy of three cas-code devices has been calculated and indicated inFig. 8 to distinguish the short circuit capability of theFig. 5: The short circuit currents of the 650 V SiC, 900 VGaN and 1200 V SiC cascode devices with differ-ent gate resistors under 30 V DC-link voltage at175°C. The 650 V GaN cascode device is failedafter 10 V single pulse.cascode devices. With increasing temperature andDC-link voltage level, 900 V GaN cascode devicepresents higher short circuit energy compare to1200 V SiC, unlike with lower level of temperatureand DC-link voltage.The comparison between the low rated and highrated cascode devices regarding the short circuitenergy has been demonstrated in Fig. 9. As it isseen in the figure, the low rated SiC exhibits largershort circuit energy in comparison with high ratedcascode devices. The 650 V SiC cascode devicesdials with the largest short circuit energy underdifferent conditions.2.2 Short circuit currents concerning theDC-link voltagesThe short circuit stress is increased with DC-linkvoltage level, for that reason the DC-link voltage isFig. 6: The short circuit currents of the three cascodedevices with 10 Ω and 100 Ω gate resistors under30 V DC-link voltage at 175°C.Fig. 7: The short circuit energy of the cascode deviceswith 10 Ω and 100 Ω gate resistors under 10 VDC-link voltage at 25°C.changed from 10 V to 30 V to perceive the alter-ation in the drain source currents of the 650 V SiC,900 V GaN and 1200 V SiC cascode power devicesat room temperature with 10 Ω gate resistor, as it isshown in Fig. 10. The changes of the DC-link volt-age level is proportional to the short circuit currentFig. 8: The short circuit energy of the cascode deviceswith 10 Ω and 100 Ω gate resistors under 30 VDC-link voltage at 175°C.Fig. 9: The short circuit energy of the cascode deviceswith 10 Ω and 100 Ω gate resistors under 30 VDC-link voltage at 175°C.of the cascode devices with 10 Ω at 25°C.Furthermore, the short circuit energies of thesethree cascode devices have been calculated with10 Ω gate resistor at 25°C as they are highlighted inFig. 11 to evaluate the impact of the DC-link voltagelevels on them. It is obvious that the short circuit en-ergy of three cascode devices has multiplied by theDC-link voltage that is directly used in calculationof the short circuit energy as a parameter.2.3 The temperature sensitivity of theshort circuit currentsIn this part, the temperature impact on the short cir-cuit performance of the cascode devices have beeninvestigated. The short circuit currents of the SiCFig. 10: The short circuit currents of the 650 V SiC,900 V GaN and 1200 V SiC cascode deviceswith 10 Ω and 100 Ω gate resistors under varyDC-link voltages at 25°C. The 650 V GaN cas-code device is failed after 10 V single pulse.Fig. 11: The short circuit energy of the cascode deviceswith 10 Ω gate resistor under vary DC-link volt-age at 25°C.cascode devices are decreasing with increasing ofthe temperature, whilst it is increasing for the GaNas it is illustrated in Fig. 12. The increase of theshort circuit current in GaN cascode can be relatedto current collapse phenomenon that rises the chan-nel resistance temporarily during switching period.This phenomenon is especially seen in the deviceat high temperature where current density have be-come irregular and concentrated on narrow regionsthat results in the higher on state resistance andreduction of the current carrying capacity [9], [10].Fig. 12: The short circuit currents of the 650 V SiC,900 V GaN and 1200 V SiC cascode deviceswith 10 Ω gate resistors under 30 V DC-linkvoltages at 25°C and 175°C. The 650 V GaNcascode device is failed after 10 V single pulse.Considering the short circuit energy of the WBGcascode power devices under 30 V with 10 Ω gateresistor, indicated in Fig. 13, the 650 V SiC cascodedevice displays greater short circuit energy thanthe high rated cascode power devices. This is dueto smaller chip area and smaller thermal energystorage in 650 V SiC cascode device that causesquicker heating and cooling of the device duringthe short circuit test. These processes results inthe hot spots in the device structure that increasesshort circuit energy dissipation of the device [11].Fig. 13: The short circuit energy of the cascode deviceswith 10 Ω gate resistor under 30 V DC-link volt-age at different temperature.The temperature coefficient of the pinch off volt-age leads increase of the drain current with highertemperature in SiC cascode devices, whereas thenegative temperature coefficient results in decreaseof the drain current with higher temperature. Fromthis perspective, the impact of the temperature co-efficient is higher than the temperature coefficientof the pinch-off voltage for the 650 V and 1200 VSiC cascode devices [12].3 ConclusionIn this paper, the short circuit ruggedness capabilityof the power cascode devices have been evaluatedand compared with each other under different con-ditions, such as the variety of gate resistor, DC-linkvoltage, temperature. As it shown, the 650 V GaNcascode device has failed, even with very low levelof DC-link voltage for very short period. This canbe related to that the 650V GaN has less capabilityof the short circuit with poor thermal managementin comparison with other counterparts. Besides,low rated cascode devices have more short circuitenergy, than the high rated cascode devices evenwhen the temperature, DC-link voltage and gateresistor are increased in turn by reason of the in-ternal resistances of low rated devices is higherand leading higher power dissipation in the devicestructure and concluding larger short circuit energyin low rated devices.References[1] K. Zhong and et al., “Avalanche capability of 650-v normally-off gan/sic cascode power device,” in33rd Int. Symposium on Power SemiconductorDevices (ISPSD), IEEE, 2021, pp. 223–226.[2] J. Ortiz Gonzalez and et al., “Dynamic characteri-zation of sic and gan devices with bti stresses,” Mi-croelectronics Reliability, vol. 100-101, p. 113 389,2019. DOI: https://doi.org/10.1016/j.microrel.2019.06.081.[3] A. Fayyaz and et al., “Transient robustness testingof silicon carbide (sic) power mosfets,” in 15thEuropean Conference on Power Electronics andApplications (EPE), IEEE, 2013, pp. 1–10.[4] R. Wu and et al., “Current sharing of paral-lel sic mosfets under short circuit conditions,”in 2021 23rd European Conference on PowerElectronics and Applications (EPE’21 ECCEEurope), 2021, pp. 1–9. DOI: 10 . 23919 /EPE21ECCEEurope50061.2021.9570690.[5] C. Chen and et al., “Study of short-circuit robust-ness of sic mosfets, analysis of the failure modesand comparison with bjts,” Microelectronics Relia-bility, vol. 55, no. 9-10, pp. 1708–1713, 2015.[6] D. Marroqui and et al., “Sic mosfet vs sic/si cas-code short circuit robustness benchmark,” Micro-electronics Reliability, vol. 100, p. 113 429, 2019.[7] E. Bashar and et al., “Comparison of short circuitfailure modes in sic planar mosfets, sic trenchmosfets and sic cascode jfets,” in 2021 IEEE 8thWorkshop on Wide Bandgap Power Devices andApplications (WiPDA), 2021, pp. 384–388. DOI:10.1109/WiPDA49284.2021.9645092.[8] R. Siemieniec and et al., “Stability and perfor-mance analysis of a sic-based cascode switchand an alternative solution,” Microelectronics Reli-ability, vol. 52, no. 3, pp. 509–518, 2012.[9] S. Ho and et al., “Suppression of current col-lapse in enhancement mode gan-based hemtsusing an algan/gan/algan double heterostructure,”IEEE Trans. on Electron Devices, vol. 64, no. 4,pp. 1505–1510, 2017. DOI: 10.1109/TED.2017.2657683.[10] Y. Kumazaki and et al., “Remarkable currentcollapse suppression in gan hemts on free-standing gan substrates,” in IEEE BiCMOSand Compound semiconductor Integrated Cir-cuits (BCICTS), 2019, pp. 1–4. DOI: 10.1109/BCICTS45179.2019.8972742.[11] D. Shen and et al., “Determination of failure de-gree of 1.2 kv sic mosfets after short-circuit testusing an improved test setup,” Nanotechnologyand Precision Eng., vol. 3, no. 4, pp. 235–240,2020.[12] R. Wu and et al., “Measurement and simulationof short circuit current sharing under parallel con-nection: Sic mosfets and sic cascode jfets,” Micro-electronics Reliability, vol. 126, p. 114 271, 2021.

Experimental Analysis of Short Circuit Robustness of GaN and SiC Cascode Devices

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Experimental Analysis of Short Circuit Robustness of GaN and SiC Cascode Devices

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