Formal specification is a basis for rigorous software implementation. VDM-SL
is a formal specification language with an extensive executable subset.
Successful cases of VDM-family including VDM-SL have shown that producing a
well-tested executable specification can reduce the cost of the implementation
phase. This paper introduces and discusses the reversed order of specification
and implementation. The development of a multi-agent simulation language called
\remobidyc is described and examined as a case study of defining a formal
specification after initial implementation and reflecting the specification
into the implementation code