Temperature compensated ring oscillator based VCO

Abstract

Frequency drift due to temperature variations is a crucial design consideration and cannot always be compensated by a phase-locked loop especially when low-gain, multiband oscillators are employed. A ring oscillator architecture with reduced frequency drift over temperature is presented in this paper. The oscillator is incorporated in a phase locked loop (PLL) to produce a stable clock within the required frequency range under process, voltage, and temperature variations. The output frequency of the oscillator is compensated through a proportional to absolute temperature (PTAT) current in order to eliminate the frequency drift. A proof-of-concept PLL has been designed and fabricated in a 180 nm CMOS technology operating with 3.3 V supply voltage and providing a 480 MHz frequency. Measurement results of the fabricated chip show a frequency variation of the VCO from −1.5 % to + 0.4 % from the center frequency across the temperature range from −40 °C to 120 °C meeting the requirements for most consumer market applications. The duty cycle distortion is less than 1% across the temperature range. The phase noise of the oscillator was measured at −107 dBc/Hz. © 2022 Elsevier Gmb