Fault injection on microarchitectural structures modeled in performance
simulators is an effective method for the assessment of microprocessors
reliability in early design stages. Compared to lower level fault
injection approaches it is orders of magnitude faster and allows
execution of large portions of workloads to study the effect of faults
to the final program output. Moreover, for many important hardware
components it delivers accurate reliability estimates compared to
analytical methods which are fast but are known to significantly
over-estimate a structure’s vulnerability to faults.
This paper investigates the effectiveness of microarchitectural fault
injection for x86 and ARM microprocessors in a differential way: by
developing and comparing two fault injection frameworks on top of the
most popular performance simulators, MARSS and Gem5. The injectors,
called MaFIN and GeFIN (for MARSS-based and Gem5-based Fault Injector,
respectively), are designed for accurate reliability studies and deliver
several contributions among which: (a) reliability studies for a wide
set of fault models on major hardware structures (for different sizes
and organizations), (b) study on the reliability sensitivity of
microarchitecture structures for the same ISA (x86) implemented on two
different simulators, (c) study on the reliability of workloads and
microarchitectures for the two most popular ISAs (ARM vs. x86).
For the workloads of our experimental study we analyze the common trends
observed in the CPU reliability assessments produced by the two
injectors. Also, we explain the sources of difference when diverging
reliability reports are provided by the tools. Both the common trends
and the differences are attributed to fundamental implementations of the
simulators and are supported by benchmarks runtime statistics. The
insights of our analysis can guide the selection of the most appropriate
tool for hardware reliability studies (and thus decision-making for
protection mechanisms) on certain microarchitectures for the popular x86
and ARM ISAs
