Eastern Macedonia and Thrace Institute of Technology
Abstract
With the evolution of wireless communication systems, it is increasingly difficult for Application Specific Integrated
Circuit (ASIC) solutions to meet the daily changing requirements. A network on chip (NOC) multi-core processor based
on message-passing programming model is designed to implement the LTE-A turbo decoder in a parallel mode using
pure Software Defined Radio (SDR) approach. The NOC is well balanced between the hardware and software design
with a high degree of programmability and re-configurability. According to the features of the NOC multi-core processor,
the implementation of turbo decoder is optimized to reduce the computational complexity and to increase the
parallelization. Several aspects of turbo decoder are investigated in software radio approach rather than hardware.
Compared with the results of the software simulation and the Field Programmable Gate Array (FPGA) demonstration, the
NOC multicore processor is flexible to realize the proposed turbo decoding algorithm. In addition, our solution has
comparable performance with other published ones