Biggs, Benjamin

Constantinides, George A.

Kerrigan, Eric C.

McInerney, Ian

English

The growing proliferation of FPGAs and High-level Synthesis (HLS) tools has led to a large interest in designing hardware accelerators for complex operations and algorithms. However, existing HLS toolflows typically require a significant amount of user knowledge or training to be effective in both industrial and research applications. In this paper, we propose using the Julia language as the basis for an HLS tool. The Julia HLS tool aims to decrease the barrier to entry for hardware acceleration by taking advantage of the readability of the Julia language and by allowing the use of the existing large library of standard mathematical functions written in Julia. We present a prototype Julia HLS tool, written in Julia, that transforms Julia code to VHDL. We highlight how features of Julia and its compiler simplified the creation of this tool, and we discuss potential directions for future work

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The University of Manchester ResearchHigh-level Synthesis using the Julia LanguageDocument VersionFinal published versionLink to publication record in Manchester Research ExplorerCitation for published version (APA):Biggs, B., McInerney, I., Kerrigan, E. C., & Constantinides, G. A. (2022). High-level Synthesis using the JuliaLanguage. Paper presented at 2nd Workshop on Languages, Tools, and Techniques for Accelerator Design,Lausanne, Switzerland. https://capra.cs.cornell.edu/latte22/paper/7.pdfCiting this paperPlease note that where the full-text provided on Manchester Research Explorer is the Author Accepted Manuscriptor Proof version this may differ from the final Published version. If citing, it is advised that you check and use thepublisher's definitive version.General rightsCopyright and moral rights for the publications made accessible in the Research Explorer are retained by theauthors and/or other copyright owners and it is a condition of accessing publications that users recognise andabide by the legal requirements associated with these rights.Takedown policyIf you believe that this document breaches copyright please refer to the University of Manchester’s TakedownProcedures [http://man.ac.uk/04Y6Bo] or contact uml.scholarlycommunications@manchester.ac.uk providingrelevant details, so we can investigate your claim.Download date:21. Oct. 2022High-level Synthesis using the Julia LanguageBenjamin BiggsImperial College LondonUKIan McInerneyThe University of ManchesterUKEric C. KerriganImperial College LondonUKGeorge A. ConstantinidesImperial College LondonUKABSTRACTThe growing proliferation of FPGAs and High-level Synthesis (HLS)tools has led to a large interest in designing hardware acceleratorsfor complex operations and algorithms. However, existing HLStoolflows typically require a significant amount of user knowledgeor training to be effective in both industrial and research appli-cations. In this paper, we propose using the Julia language as thebasis for an HLS tool. The Julia HLS tool aims to decrease the bar-rier to entry for hardware acceleration by taking advantage of thereadability of the Julia language and by allowing the use of theexisting large library of standard mathematical functions writtenin Julia. We present a prototype Julia HLS tool, written in Julia, thattransforms Julia code to VHDL. We highlight how features of Juliaand its compiler simplified the creation of this tool, and we discusspotential directions for future work.KEYWORDSFPGA, high-level synthesis (HLS), Julia language1 INTRODUCTIONThere is a growing need for high throughput, low latency, andenergy efficient compute platforms, such as Field ProgrammableGate Arrays (FPGAs), by a wide selection of tasks, including ma-chine learning and real-time control. These platforms often havea high barrier to entry for software developers and researcherswho are unfamiliar with digital hardware development, creatingwhat is known as the “two-language” problem. The “two-language”problem presents the typical hardware accelerator developmentworkflow as first having a researcher develop and prototype theapplication algorithms in a high-level language, such as Pythonor MATLAB, that is simpler to code and is mathematics-friendly.Then the algorithm is passed to an engineer who translates it intoa lower-level language, such as C/C++/VHDL/Verilog, to achievethe desired performance targets.The Julia language [5, 6] aims to solve this “two-language” prob-lem by providing a higher-level and human-readable language thatcompiles into performant machine code for CPUs. Extensions toJulia have also been developed to compile normal Julia code toPermission to make digital or hard copies of part or all of this work for personal orclassroom use is granted without fee provided that copies are not made or distributedfor profit or commercial advantage and that copies bear this notice and the full citationon the first page. Copyrights for third-party components of this work must be honored.For all other uses, contact the owner/author(s).LATTE ’22, March 1, 2022, Lausanne, Switzerland© 2022 Copyright held by the owner/author(s).accelerator hardware such as GPUs [9], distributed processors [10],and TPUs [4]The goal of High-level Synthesis (HLS) tools for FPGAs is to solvethe “two-language” problem by allowing FPGAs to be programmedusing higher-level languages instead of VHDL/Verilog. However,the more mature toolflows like LegUp [1] or Vivado only movethe accelerator implementation from VHDL/Verilog into languageslike C and C++. Prototype toolflows have been made using higher-level languages, such as Python [2, 8], but these usually require thecreation of separate compilers/transpilers to translate the chosenlanguage into an FPGA design.In this paper, we propose to use Julia as a high-level language forFPGA accelerators, and that the HLS toolflow should be written inJulia as well. We start in Section 2 by describing the features Juliahas that makes it an ideal language for FPGA HLS, and present abrief report on a prototype Julia HLS tool in Sections 3 and 4.2 ADVANTAGES OF THE JULIA LANGUAGEJulia was developed as a language for scientific computing thatsought to provide both ease of programming and performant low-level machine code. The Julia ecosystem contains many mathemat-ical packages, and unlike other higher-level languages, many ofthese packages are written in pure Julia instead of being a thinwrapper over an underlying C/C++ library. This means a Julia HLStoolflow could recurse into the packages and generate hardwarefor them using the HLS compiler instead of having to provide andsubstitute in hand-written function blocks.The Julia compiler is also mainly written in Julia, and providesseveral places to hook into the compilation flow to modify/observethe compilation. This means that an HLS toolflow for Julia that iswritten in Julia can benefit by reusing existing compiler stages andoptimisation passes used for the CPU compiler. This also allows formore easier CPU simulation of the desired algorithm, since the ini-tial stages of the compiler flow can be shared between the CPU andHLS tools. Three other design features of Julia that provide benefitsfor an HLS toolflow are built-in data-flow type inference, multipledispatch for method specialisation, and extensive metaprogrammingfeatures.2.1 Data-flow type inferenceIn Julia, explicit type declarations of variables are not required forthe code to successfully run because Julia executes a data-flow typeinference pass in its compiler to infer these types. The type inferencepass tries to produce “type-stable” code, where all the types in thecode are known explicitly at compile time, by combining any knowntype information on a variable alongside a type lattice to propagateLATTE ’22, March 1, 2022, Lausanne, Switzerland Benjamin Biggs, Ian McInerney, Eric C. Kerrigan, and George A. ConstantinidesAbstract SyntaxTreeLowered IntermediateRepresentation(Macro Expansion)LLVMIntermediateRepresentationTyped IntermediateRepresentationJulia SourceCodeNative Machine CodeSSAToolsPackageDynamicSchedulingPackageScheduledHardware VHDLTranslatorFigure 1: Overview of the Julia compiler & HLS flow.types to every variable. An HLS toolflow can then utilize the typedIntermediate Representation (IR) after the type inference compilerpass when generating the hardware.2.2 Multiple dispatchJulia utilizes multiple dispatch, where the compiler and/or run-timeenvironment examines the types of all function inputs, and thenchooses a version of the function that has been written for thespecified input types. Using multiple dispatch allows the creationof more efficient and readable code by allowing developers to writefunctions that contain the generic operations, while also providingfunctions optimised for the provided input types. Multiple dispatchcan also be used for built-in operators, like “+”, allowing the HLStoolflow to provide FPGA-specific methods for the basic operatorsthat can be automatically chosen by the Julia compiler when usingthe HLS toolflow, eliminating the need to modify the actual appli-cation source code to reference the HLS-specific basic operatorsinstead of the normal CPU operators.2.3 Meta-programmingJulia has an extensive metaprogramming capability provided in thelanguage, allowing Julia code to modify and transform other Juliacode before it is compiled. This is accomplished by writing Juliamacros, which can be attached to variables, functions and controlflow statements. Macros have direct access to the Abstract SyntaxTree (AST) for the associated code blocks and are evaluated beforethe lowered IR is generated. The Julia AST includes informationsuch as function calls, loops and conditional statements, allowingthe macros to operate directly on the control flow operators. HLSanalysis and optimization passes can be implemented using Juliamacros tomodify the AST and interact with the control flow directly,instead of having to infer the original control flow from the LLVMbasic blocks and phi-nodes.3 TRANSFORMING JULIA INTO HARDWAREThe Julia HLS toolflow takes a subset of the Julia source code andtransforms it into synthesisable HDL that can be tested in simula-tion. The flow is contained inside two Julia packages, SSATools.jland DynamicScheduling.jl, that convert the Julia code into a ControlData-Flow Graph (CDFG) made from elastic components detailed inthe Dynamatics tool [7] which then generates VHDL for synthesiswith Vivado HLS, as shown in Figure 1.3.1 Initial ExperimentsThe dynamic scheduling in Dynamatics formed the baseline for theinitial results of the toolflow. The testcases used were chosen to testsimple programmatic constructs like conditional statements andlooping as well as the decomposition of mathematical functions bythe Julia compiler.Program Basic Blocks ComponentsJulia C++ Julia C++if_else 5 3 41 32power 4 4 61 64newton_raphson 10 6 225 147Table 1: Synthesis results for the Julia HLS toolflow.The first testcase was an if-else conditional with three returnstatements based on the computation of the two input variables.This was chosen to test the processing of branching in the SSAToolsconstruction of the CDFG. Another testcase was a loop implemen-tation of the power function, where the first input is raised to thepower of the second through repeated multiplication in a whileloop. The Julia compiler decomposes the loop into several basicblocks as part of the typed IR, and the CDFG generation determinesthe dependencies of the variables within those blocks. The finaltestcase implemented the Newton-Raphson method for determin-ing the roots of a simple polynomial. This combined mathematicaloperations, conditionals and looping to fully explore the currentversion of the toolflow.The results of these testcases are outlined in Table 1, and arecompared to the Dynamatics baseline for the same testcases imple-mented in C++. The number of components directly correspondsto FPGA resource usage, since the programs are dynamically sched-uled.4 EVALUATION AND FUTUREWORKThe difference in resources between the Julia HLS toolflow and Dy-namatics is due to the number of basic blocks generated for the IR.The Dynamatics flow initially had more basic blocks in the LLVMIR in each case, but the LLVM optimization passes consolidatedblocks together. Equivalent versions of these passes should be cre-ated for the Julia flow. The main limitation of the current toolflowis the lack of data memory integration. Adding memory supportrequires the extraction of additional information from the typed IR,as well as component support for handling memory accesses on theFPGA. Additionally, static scheduling for the operations should beimplemented to allow for more resource-efficient designs. Finally,Julia is designed to be an open-source language, so the HDL outputof our tool should be usable in open-source tools like Yosys [11]as well as closed-source tools like Vivado. Any IP cores requiredshould be generated using FloPoCo [3] or other open-source HDLlibraries.5 CONCLUSIONThe aim of this work was to detail the key features of the Julialanguage that make it a powerful and adaptable language for thegeneration of custom hardware designs for FPGAs. The higher-levelnature of the language makes complex mathematical functions andalgorithms easier to represent while also generating optimal low-level machine code. We have discussed several of the benefits thelanguage provides, and showed our first attempt at designing aJulia-based toolflow that is able to translate a subset of the Julialanguage’s typed IR into a CDFG for VHDL code generation. Thiswork forms the basis for an array of future work, including theimplementation of memory support and alternative schedulingmethods.High-level Synthesis using the Julia Language LATTE ’22, March 1, 2022, Lausanne, SwitzerlandREFERENCES[1] Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona,Tomasz Czajkowski, Stephen Brown, and Jason Anderson. 2013. LegUp: AnOpen-Source High-Level Synthesis Tool for FPGA-Based Processor/AcceleratorSystems. ACM Transactions on Embedded Computing Systems 13, 2 (2013), 1–27.https://doi.org/10.1145/2514740[2] Radosław Cieszewski, Krzysztof Pozniak, and Ryszard Romaniuk. 2014. Pythonbased high-level synthesis compiler. In Photonics Applications in Astronomy,Communications, Industry, and High-Energy Physics Experiments 2014, Ryszard S.Romaniuk (Ed.), Vol. 9290. International Society for Optics and Photonics, SPIE,981–988. https://doi.org/10.1117/12.2075988[3] Florent Dinechin and Bogdan Pasca. 2011. Designing Custom Arithmetic DataPaths with FloPoCo. IEEE Design and Test of Computers 28, 4 (2011), 18–27.https://doi.org/10.1109/MDT.2011.44[4] Keno Fischer and Elliot Saba. 2018. Automatic Full Compilation of Julia Programsand ML Models to Cloud TPUs. arXiv 1810.09868 (Oct. 2018).[5] Nick Heath. 2018. Why is programming language Julia growing so fast and whereis it going next? https://www.techrepublic.com/article/julia-whats-next-for-pythons-fast-growing-programming-language-rival/ Accessed: 16/02/2022.[6] Jeff Bezanson, Alan Edelman, Stefan Karpinski, Viral Shah. 2015. Julia: A FreshApproach to Numerical Computing. SIAM Rev. 59, 1 (2015), 65–98. https://doi.org/10.1137/141000671[7] Lana Josipović, Radhika Ghosal, and Paolo Ienne. 2018. Dynamically ScheduledHigh-level Synthesis. In Proceedings of 2018 ACM/SIGDA International Symposiumon Field-Programmable Gate Arrays (FPGA 2018). ACM, Monterey, CA, USA, 127–136. https://doi.org/10.1145/3174243.3174264[8] Alexandre Quenon and Vitor Ramos. 2021. Towards Higher-Level Synthesisand Co-design with Python. In Workshop on Languages, Tools, and Techniquesfor Accelerator Design (LATTE’21). Virtual, World. https://capra.cs.cornell.edu/latte21/paper/20.pdf[9] Tim Besard, Christophe Foket, Bjorn De Sutter. 2019. Effective Extensible Pro-gramming: Unleashing Julia on GPUs. IEEE Transactions on Parallel and Dis-tributed Systems 30, 4 (2019), 827–841. https://doi.org/10.1109/TPDS.2018.2872064[10] Tim Besard, Valentin Churavy, Alan Edelman, Bjorn De Sutter. 2019. Rapidsoftware prototyping for heterogeneous and distributed platforms. Advancesin Engineering Software 132 (2019), 29–46. https://doi.org/10.1016/j.advengsoft.2019.02.002[11] YosysHQ. [n.d.]. Yosys Open Synthesis Suite. https://github.com/YosysHQ/yosys.Accessed: 04/01/2020.

High-level Synthesis using the Julia Language

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High-level Synthesis using the Julia Language

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