A review is made of the infrastructure, technology and capabilities of Sandia National Laboratories for the development of micromechanical systems that have potential space applications. By incorporating advanced fabrication processes, such as chemical mechanical polishing, and several mechanical polysilicon levels, the range of micromechanical systems that can be fabricated in these technologies is virtually limitless. Representative applications include a micro-engine driven mirror, and a micromachined lock. Using a novel integrated MEMS/CMOS technology, a six degree-of-freedom accelerometer/gyroscope system has been designed by researchers at U.C. Berkeley and fabricated on the same silicon chip as the CMOS control circuits to produce an integrated micro-navigational unit

Allen, J. J.

Krygowski, T. W.

Miller, S. L.

Montague, S.

Rodgers, M. S.

Schriner, H.

Smith, J. H.

Sniegowski, J. J.

A review is made of the infrastructure, technology and capabilities of Sandia National Laboratories for the development of micromechanical systems that have potential space applications. By incorporating advanced fabrication processes, such as chemical mechanical polishing, and several mechanical polysilicon levels, the range' of rrticromechanical systems that can be fabricated in these technologies is virtually limitless. Representative applications include a micro- engine driven mirror, and a micromachined lock. Using a novel integrated MEM!YCMOS technology, a six degree-of-freedom accelerometer/gyroscope system has been designed by researchers at U.C. Berkeley and fabricated on the same silicon chip as the CMOS control circuits to produce an integrated micro-navigational unit

UNT Digital Library

,The International Conferenceon integratedNano/A4iixotechnob~ for SpaceApplications(NanoSpace98’). 7+2HoustwL Texas, Novemberl-~ 1998.5ww2?g’. 247137C.Micromachined Systems-on-a-Chip:Infrastructure, Technology and ApplicationsThomas W. Krygowski, Heather Schriner, Jeffry J. Sniegowski, M. Steven RoJamesJ. Allen, JamesH. Smith,Samuel L. Millerl@l!?&?+’lY?@”e’Sandia National LaboratoriesIntelligent Micromachine DepartmentP.O. BOX 5800, Mail Stop 1080 @$]”,Albuquerque, New Mexico 87185-1080http://www.mdl.sandia. gov/MicromachineAbstractA review is made of the infrastructure,technology and capabilities of Sandia NationalLaboratories for the development ofmicromechanical systems that have potentialspace applications. By incorporating advancedfabrication processes, such as chemicalmechanical polishing, and several mechanicalpolysilicon levels, the range’ of rrticromechanicalsystems that can be fabricated in thesetechnologies is virtually limitless.Representative applications include a micro-engine driven mirror, and a micromachinedlock. Using a novel integrated MEM!YCMOStechnology, a six degree-of-freedomaccelerometer/gyroscope system has beendesigned by researchers at U.C. Berkeley andfabricated on the same silicon chip as theCMOS control circuits to produce an integratedmicro-navigational unit.I. IntroductionThe employment of MEMS for spaceapplications has the potential to lead to asignificant reduction in the cost of a mission due tothe miniaturization of critical components, such asnavigational systems and sensors, and canpotentially improve reliability due to the smallincremental cost of adding redundant systems. Byintegrating a wide array of sensors on-chip, thecapabilities of low-cost space vehicles, probes andmicrosatellites will be dramatically improved.Thus advances in the MEMS field today to producelow-cost sensors and actuators will have a directimpact on the cost, capabilities and ultimatefeasibility of future space missions.At the forefront of this revolution insilicon surface micromachining is theMicroelectronics Development Laboratory (MDL)at Sandia National Laboratories. Established in1945, Sandia has a long history of pioneeringachievements in the microelectronics field, and isnow leading the way in developing thetechnologies and capabilities required for the nextgeneration of MEMS components. In this paperwe review the extensive fabrication facilities atSandia, as well as several technologies underdevelopment for MEMS applications. Thesetechnologies include a baseline fabrication processavailable to the public as a foundry for agileprototyping applications, an advanced MEMStechnology employing five structural layers ofmechanical polysilicon, and a unique integratedMEMS/CMOS technology that was recentlylicensed to industry to produce integrated sensor,control and actuator systems.IL Infrastructure and Process DevelopmentMEMS work carried out at Sartdia isprimarily done at the MDL, Figure 1, which has15,000 square feet of Class 1 clertnroom spacededicated to the development of CMOS integratedcircuits and MEMS. Baseline CMOS technologiesare fabricated alongside MEMS, sharing anextensive semiconductor toolset and knowledgebase.Figure 1. The Microeleetranics Development Laboratory(MDL) at San&m National Laboratories.DISCLAIMERThis report was prepared as an account of work sponsoredbyanagency of the United States Government. Neither theUnited States Government nor any agency thereof, nor anyof their employees, make any warranty, express or implied,or assumes any legal liability or responsibility for theaccuracy, completeness, or usefulness of any information,apparatus, product, or process disclosed, or represents thatits use would not infringe privately owned rights. Referenceherein to any specific commercial product, process, orservice by trade name, trademark, manufacturer, orotherwise does not necessarily constitute or imply itsendorsement, recommendation, or favoring by the UnitedStates Government or any agency thereof. The views andopinions of authors expressed herein do not necessarilystate or reflect those of the United States Government orany agency thereof.DISCLAIMERPortions of this document may be illegiblein electronic image products. Images areproduced from the best available originaldocument.MEMS development is constrained to becompatible with conventional CMOS technologies,which in turn makes the processes and technologiesdeveloped at Sandia seamlessly transferable toindustry.To design highly functional, complexMicrosystems, a technology must be capable ofincorporating several layers of structuralpolysilicon. However, internal stresses in thepolysilicon layers can distort the mechanicalstructure and lead to stiction effects, whichtypically lowers device yield. Sandia has carriedout extensive characterization of it’s fine-grainedpolysilicon, and developed proprietary techniquesto anneal out internal stresses in-situ so as tomitigate these effects. The result is that Sandia’sfine-grained polysilicon displays a low internalstress of less than 5 MPa after proper annealingcycles, producing small deflections of less than 1Lm [1], for structures up to 1000 pm in length.An important component of many of themulti-layer MEMS processes developed at Sandiais Chemical Mechanical Polishing (CMP) for theplanarization of the upper layer of mechanicalpoiysilicon. In a typical MEMS device, thetopology can produce features as high as 12 #m.This surface topology can constrain the movementof upper polysilicon layers after these conformalfilms are deposited, patterned and released in HF.A process was developed to CMP sacrificial oxidesdeposited from TEOS [2] prior to polysilicondeposition, using an alkaline abrasive slurry. Theresult is a flat, non-confonnal mechanicalpolysilicon layer over underlying topography andelectrical interconnects. This capability enabledthe fabrication of complex interlocking gear trains,discussed in a later section, as well as thefabrication of optically smooth surfaces for MEMSbased adaptive optical systems [3]. Figure 2 showsthe impact of CMP on complex MEMScomponents. Figure 2(a) shows the overhangproduced by an upper layer of polysilicon on eitherside of gear hub, leading to mechanicalinterference with the adjacent gear. Thismechanical interference can be eliminated byplanarizing the sacrificial oxide between thegearfiub and linkage arm levels of polysilicon, asshown in Figure 2(b).By tailoring many of the processescommonly available in a CMOS fabrication line forMEMS, such as polysilicon deposition andannealing conditions and CMP, a comprehensivefabrication technology has been synthesized whichcan be used to produce a wide array of MEMScomponents.(a)<. -.@)Figure 2. (a) Impact of conformat polysitkon on anunptanarized surfacq leading to meehanicat interference(overhang) with underlying polysilicon layers. (b)Etiination of meehanicat interferenm by CMP ofsacvitieial oxide.HI. Technology and ApplicationsSUMh4iT-IV TechnologyA baseline fabrication process, called theSandia Ultra-planar Multi-level MEMSTechnology (SUMMiT), has been developed toexplore novel concepts in MEMS design. TheSUMMiT-IV technology is the only foundryprocess available which utilizes three layers ofreleasable polysilicon, for a total of four layers(including a ground plane), as shown in Figure 3..S2mctu.1 Pdysiticon ❑ SserilWaloside ❑ SiJ’5,~32s pm MMPOly2pm SacOx 3 (@P)15 w WwOly1 m Wu%lyo.spmsacOx20.3 pm MIAPOly 2pmsacOxl(Grw-ld PIMO+yo.8omi#,O.mpmnw’tmlsiq+SiUcOnSubstm2eFigure 3. Composition of alternating layers of polysificonand sacfiIciai oxide used in the SUMMii-IV Teehnolo~.The SUMMiT process was developed tobe compatible with a wide range of standardMEMS components. For example, by using aground plane (poly O) and a single layer ofmechanical polysilicon (poly 1), one could createan electrostatic comb drive or scratch drive foractuation. By adding a poly 2 layer to the process,one can create a gear mechanism constrained torotate on a hub, as well as out-of-plane mirrors andhinges [3]. By adding a CMP step to planarize thethird sacrificial oxide layer, and a third mechanicallayer of polysilicon, one can form linkagesbetween actuators and output gears, as well ascomponents for a wide array of micro-mechanical,optical and fluidic systems*.A major program driving the developmentof the SUMMiT process is the stronglinkmicromechanical lock, used for weapon safetyapplications. At the heart of the stronglink is a setof electrostatically driven microengines [4], whichare formed by connecting orthogonal comb drivesthrough linkages to an output gear, which iscapable of delivering moderate amounts of torqueto a load. The top speed of the microengine hasbeen measured at 300,0CM)rpm, using a -90Vamplitude drive signal tailored for the microengine[5]. To increase the torque at the expense of speed,a micro-transmission was developed [6] using a setof 3:1 and 4:1 reduction gears. By cascadingseveral of these 12:1 gear trains, a gear reductionratio of 3 million to 1 was recently demonstrated,with a corresponding increase in torque. Byincorporating a rack and pinion assembly toconvert rotational to linear motion, controllablestep sizes as small as 0.8 nm have been realized.Figure 4 shows a component of the stronglink in1 The SUMMiT-fV process, as well as the integratedTechnology (discussed later), is available to the public throughour Agile Prototyping Program, aflowing researchers tofabricate state-of-the-art MEMS designs in a well characterized,base-tine technologies. More information is available athfipYhww.mciLsendia. govAUictvmachinewhich a microengine, micro-transmission and arack and pinion assembly are used to drive apolysilicon mirror out of plane. The benefits ofCMP in the SUMMiT-IV technology are clearlyevident for this type of system, resulting in smoothoptical surfaces on the polysilicon mirrors. It isnoted that the basic elements used in the Stronglinksystem can be adopted for a wide range of MEMSapplications. Additional devices fabricated usingthe SUMMiT-IV technology include deformablepiston mirror arrays for phase detection andmodulation [3], as well as opticaI shutters for lasersand fiber optic applications.Figure 4. Polysiticon mirror driven out of ptane using amicroengin~ micro tmnsmhion and mck and pinionassembly.SUMMiT- V TechnologyThe need for greater functionality in theStronglink design, led to the recent development ofthe SUMMiT-V Technology. This processincludes several additional steps to the SUMMiT-IV Technology, including art additional sacrificialoxide layer and a second CMP step as well as afifth mechanical layer of polysiIicon (including aground plane). The goal of this work was toinclude a 24-bit mechanical discriminator to theStronglink design, which when accessed coulddirect an optical data signal using two opposingpolysilicon mirrors. Thus, the additional layer ofpoIysilicon aIlows for the fabrication of a range ofcritical features such as a linear pin-in mazediscriminator, as well as gear trains on moveableplatforms [7]. Figure 5 is a schematic of the mostrecent Stronglink design, showing one half of thecomplete system. This award winning design [8] isconsidered to be the most complex, fully actuated,surface micro-machined system fabricated to date.Using the additional flexibility of theSUMMiT-V technology, many of the standardcomponents developed in the SUMMiT-IVtechnology were completely redesigned. Thisincludes electrostatic comb drives used in themicroengine, which benefit from stacking severalmechanical layers of polysilicon, leading to adramatic increase the z-axis stiffness of the supportsprings. In addition, advanced designs for themicroengine linkage assembly were implementedto reduce the deleterious effects of stiction [7]. Aswith the SUMMiT-IV process, several annealingsteps are included in this technology to reducestress in the polysilicon and sacrificial oxide layers.Maze TrackMaze Pin Control- Unlock sequence isentered hereFigure 5. Latest generation Strongiink ndcromeehanieat Ioek system fabricated using the SUMMiT-V Teehnotogy, incorporatingseveral standard components redesigned for tbe new teebnology (one hatf of complete system)._jQj ControlIntegrated MEMS TechnologyA significant improvement in devicefunctionality, and a high level of integration can beobtained by integrating the control circuits andMEMS devices on the same silicon chip. In somecases in which the input stimuli produce low-levelsignals, as with certain types of capacitive sensors,the sense and control electronics have to beintegrated on-chip so as to reduce parasitic noisefrom interconnects. Previous attempts to integrateMEMS and CMOS have tried to process theMEMS devices after the CMOS [9], usingrefractory metals that can withstand the hightemperature annealing cycles required to relievestress in structural polysilicon. Still otherapproaches have tried to interleave the necessaryMEMS processing steps with the CMOS steps[10], leading to a rigid, constrained process flow.Sandia has developed a novel approach towardintegrating surface micromachined componentswith the conventional CMOS circuits, by firstfabricating the MEMS components, and thencontinuing with conventional CMOS processing.Since the surface topology of typicalMEMS devices (2-6pm) is significantly differentthan that of conventional CMOS circuits (1-2 #m)the MEMS components are fabricated in a shallow(-5 pm) trench etched into the wafer surface. Uponcompletion of the MEMS devices, the trench isbackill]ed with sacrificial oxide, planarized byCMP, and capped with a silicon nitride membrane.After a stress relief annealing cycle, the wafer isready for conventional IC processing.,.The additional thermal budget of CMOSprocessing has a negligible effect on the MEMSdevices, and can in fact further lead to a reductionof built-in stress. To release the MEMS portion ofthe system, the CMOS circuits are protected withphotoresist, and the nitride membrane andsacrificial oxide are removed in buffered HF [11].At the present time the integrated process employstwo layers of polysilicon (including the groundplane), with a four-layer process currently underdevelopment.The integrated MEMSKMOS process hasbeen well received by the semiconductor industry,having recently been awarded an R&D If.M)awardas one of the 100 most technologically significantnew products of the year. Analog Devices Inc. haslicensed Sandia’s Integrated Technology for theirnext generation inertial sensors. In collaborationwith researchers at the Berkeley Sensor andActuator Center (BSAC), several advancedprototype accelerometers and oscillators have beenfabricated in the Integrated Technology [12, 13].A cross section of a microsystem duringfabrication is shown in Figure 6. The MEMS andCMOS components are fabricated in a 6 #m,arsenic-doped epilayer. Electrical interconnectsbetween the CMOS circuitry and MEMS arethrough polysilicon studs which are at the height ofthe wafer surface and are connected to the MEMSgroundplane (MM Poly O). It is noted that withSandia’s modular approach towards integration,any type of microelectronic processing can beundertaken, including techniques to fabricateradiation-hard circuits and Bipolar and BiCMOScircuits.One of the recent results from thiscollaboration with BSAC was a six-degree of-freedom Inertial Measurement Unit (IMU),incorporating a 3 axis accelerometer and XY- andZ-axis gyroscope [14], for a small, self-containednavigational system. Figure 7 shows the layout ofthe IMU, incorporating the accelerometer, gyro’sand on-chip control circuitry, in a circuit less than1 cmz. Initial measurements on the individualcomponents show that the +/- 25g accelerometerdemonstrated an in-plane axis rms noise floor of110 I.Lg/~Hzand an 84 dB dynamic range at 100 Hzbandwidth [15]. Further testing on the completesystem is currently underway.SNL Integrated Micromechanical / CMOSCMOS Device Area Micromechaniczd Dewice Area4 & 4 ●CMOS P*2Figure 6. Integrated MEMS/CMOS Technology developed at Sandia Nationat Laboratories for the mnnotittic integration ofCMOS control circuits and MEMS sensors and actuato~ on the same siticon chip. To handte the differences in surfacetopography, the MEMS components are fabricated in a sbattow trench below the wafer surface proior to CMOS processing.VI. References~ Z-Axis Gyro ~ xYZ Accelerometer~ XY-Axis Gyro ~~lcm~Figure 7. Six degree of freedom micro-navigational systemfabricated in San&u’s MEMS/CMOS InlematedTechnology (Design by U.C. Berkeley).IV. ConclusionsMicromachined systemshave a far reaching impact on theare poised tocapabilities andfeasibility of future space missions. By performingtasks in the microworld, payload costs aresignificantly reduced, and reliability could bedramatically improved through the use ofinexpensive redundant systems fabricated en masseusing conventional integrated circuitisurfacemicromachining technology. Sandia NationalLaboratories is leading the way in MEMStechnology development with it’s baselineSUMMiT-IV process, and it’s advanced 5-levelpolysilicon SUMMiT-V process. By furtherintegrating MEMS sensors and actuators withCMOS circuits in the Integrated Technology,Sandia is establishing a new paradigm formicromachined systems-on-a-chip.V. AcknowledgementsThe authors would like to thank thepersonnel at the Microelectronics DevelopmentLaboratory at Sandia National Laboratories fordevice fabrication.Sartdia National Laboratories is amultiprogram laboratory operated by the SandiaCorporation, a Lockheed Martin Company, for theUnited States Department of Energy underContract DE-AC04-94AL85000.1. Internal measurements made at Sandia NationalLaboratories.2. J. J. Sniegowski, SPIE Micromachining andMicro fabrication Process Technology, Austin, TX,Oct. 14, 1996, Vol. 2879, pp. 104-115.3. J. H. Comtois, M. A. Michalicek, and C. C.Baron, (Invited Paper) 43rd internationallnsmumentation Symposium, Instrument Society c$America, 1997, pp. 169-178.4. J. Garcia, J. J. Sniegowski, Sensors andActuators A, Vol 38, no. 3, pp. 203-2i4.5. S. L. Miller, J. J. Sniegowski, G. LaVigrte, andP. J. McWhorter, Proc. SPIE Smart Electronics andMEMS Vol. 2722, San Diego, Feb. 28-29, 1996,pp. 197-204.6. J.J. Sniegowski, E.J. Garcia, IEEE E/ecrronDevice Lett. Vol 17, no. 7, p 366-368 (1996).7. M. Steven Rodgers, J. J. Sniegowski,Proceedings of the 1988 Solid State Sensor andActuator Workrhop, Hilton Head Island, SouthCarolina, pp. 144-149.8. M. Steve Rodgers, Design News, March 2, 1998.9. W. Yun, R. Howe, P. Gray, Proc. Of the IEEESolid State Sensors and Actuator Workshop (1992),pp. 126.10. W. Kuehnel, S. Sherman, Sensors andActuators, Vol. 45, no. 1, pp.7-16 ( 1994).11. J. H. Smith, S. Montague, J. J. Sniegowski, J.R. Murray, P. J. McWhorter, Proc. 1995 IEDM,pp. 609-612.12. M. A. Lemkin, B. E. Boser, D. Auslander, andJ. H. Smith, 1997 International Conference onSolid-State Sensors and Actuators, Chicago, IL,June 16-19, 1997, Vol. 2, pp. 1185-1188.13. T. A. Roessig, R. T. Howe, A. P. Pisano, and J.H. Smith, 1997 International Conference on Solid-Srate Sensors and Actuators, Chicago, IL, June 16-19, 1997, Vol. 2, pp. 859-862.14. J. Allen, R. D. Kinney, J. Sarstield, M. R.Daily, J. R. Ellis, J. H. Smith, S. Montague, R. T.Howe, B. E. Boser, R. Horowitz, and A. P. Pisano,M. A. Lemkin, W. A. Clark, T. Juneau, PositionLocation and Navigation Symposium (PLANS 98),Rancho Mirage, CA, April 20-23, 1998.15. M. Lemkin, M. Ortiz, N. Wongkomet, B.Boser, and J. Smith, Proc. ISSC 1997, pp. 202-203.

Micromachined Systems-on-a-Chip: Infrastructure, Technology and Applications

r I I The International Conference on integrated Nano/hlicrotechnoIogy for  Space AppIications (NanoSpace 98). + ~ f i f i - ~ V - ~ ~  67G -- 0 Houston, Teras, November 14,1998 colut'-4'8/ 117- - R E C E I W  SEP 2 4 1998 Micromachined Systems-on-a-Chip: Infrastructure, Technology and Applications Thomas W. Krygowski, Heather Schriner, Jeffry J, Sniegowski, M. Steven Rodgers, Stephen Montague, (3.6 r 1 James J. Allen, James H. Smith, Samuel L. Miller Sandia National Laboratories Intelligent Micromachine Department P.O. Box 5800, Mail Stop 1080 Albuquerque, New Mexico 87185-1080 http:llm.mdl.sandia.govMicromachine Abstract A review is made of the infrastructure, technology and capabilities of Sandia National Laboratories for the development of micromechanical systems that have potential space applications. By incorporating advanced fabrication processes, such as chemical mechanical polishing, and several mechanical polysilicon levels, the range of micromechanical systems that can be fabricated in these technologies is virtually limitless. Representative applications include a micro- engine driven mirror, and a micromachined lock. Using a novel integrated MEMSKMOS technology, a six degree-of-freedom accelerometerlgyroscope system has been designed by researchers a t  U.C. Berkeley and fabricated on the same silicon chip as the CMOS control circuits to produce an integrated micro-navigational unit. I. Introduction The employment of MEMS for space applications has the potential to lead to a significant reduction in the cost of a mission due to the miniaturization of critical components, such as navigational systems and sensors, and can potentially improve reliability due to the small incremental cost of adding redundant systems. By integrating a wide array of sensors on-chip, the capabilities of low-cost space vehicles, probes and microsatellites will be dramatically improved. Thus advances in the MEMS field today to produce low-cost sensors and actuators will have a direct impact on the cost, capabilities and ultimate feasibility of future space missions. At the forefront of this revolution in silicon surface micromachining is the Microelectronics Development Laboratory (MDL) at Sandia National Laboratories. Established in 1945, Sandia has a long history of pioneering achievements in the microelectronics field, and is now leading the way in developing the technologies and capabilities required for the next generation of MEMS components. In this paper we review the extensive fabrication facilities at Sandia, as well as several technologies under development for MEMS applications. These technologies include a baseline fabrication process available to the public as a foundry for agile prototyping applications, an advanced MEMS technology employing five structural layers of mechanical polysilicon, and a unique integrated MEMS/CMOS technology that was recently licensed to industry to produce integrated sensor, control and actuator systems. IT. Infrastructure and Process Development MEMS work carried out at Sandia is primarily done at the MDL, Figure 1, which has 15,000 square feet of Class 1 cleanroom space dedicated to the development of CMOS integrated circuits and MEMS. Baseline CMOS technologies are fabricated alongside MEMS, sharing an extensive semiconductor toolset and knowledge base. Figure 1. The Microelectronics Development Laboratory (MDL) at Sandia National Laboratories. ASTER .. . - -  , , ~ compatible with conventional CMOS technologies, *;.$( P \a. k' $< q36h ich  in turn makes the processes and technologies ,developed at Sandia seamlessly transferable to [ .  1 c, ~ z-. 6 3 2 i('4ndustry. To design highly functional, complex microsystems, a technology must be capable of incorporating several layers of structural polysilicon. However, internal stresses in the polysilicon layers can distort the mechanical structure and lead to stiction effects, which typically lowers device yield. Sandia has carried out extensive characterization of it3 fine-grained polysilicon, and developed proprietary techniques to anneal out internal stresses in-situ so as to mitigate these effects. The result is that Sandia3 fine-grained polysilicon displays a low internal stress of less than 5 MPa after proper annealing cycles, producing small deflections of less than 1 pm [l], for structures up to 1000 pm in length. An important component of many of the multi-layer MEMS processes developed at Sandia is Chemical Mechanical Polishing (CMP) for the planarization of the upper layer of mechanical polysilicon. In a typical MEMS device, the topology can produce features as high as 12 pm. This surface topology can constrain the movement of upper polysilicon layers after these conformal films are deposited, patterned and released in HF. A process was developed to CMP sacrificial oxides deposited from TEOS [2] prior to polysilicon deposition, using an alkaline abrasive slurry. The result is a flat, non-conformal mechanical polysilicon layer over underlying topography and electrical interconnects. This capability enabled the fabrication of complex interlocking gear trains, discussed in a later section, as well as the fabrication of optically smooth surfaces for MEMS based adaptive optical systems PI. Figure 2 shows the impact of CMP on complex h4EMS components. Figure 2(a) shows the overhang produced by an upper layer of polysilicon on either side of gear hub, leading to mechanical interference with the adjacent gear. This mechanical interference can be eliminated by planarizing the sacrificial oxide between the gearhub and linkage ann levels of polysilicon, as shown in Figure 2(b). By tailoring many of the processes commonly available in a CMOS fabrication line for MEMS, such as polysilicon deposition and annealing conditions and CMP, a comprehensive fabrication technology has been synthesized which can be used to produce a wide array of MEMS components. (b) Figure 2. (a) Impact of conformal polysilicon on an unplanarized surface, leading to mechanical interference (overhang) with underlying polysilicon layers. (b) Elimination of mechanical interference by CMP of sacrificial oxide. I .  III. Technolob and Applications SUMiT-IV Technoloagy A baseline fabrication process, called the Sandia , Ultra-planar Multi-level MEMS Technology (SUMMiT), has been developed to explore novel concepts in MEMS design. The SUMMiT-IV technology is the only foundry process available which utilizes three layers of releasable polysilicon, for a total of four layers (including a ground plane), as shown in Figure 3. This report was prepared as an account of work sponsored by an agency of the United States Government. Neither the United States Government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or use- fulness of any information, apparatus. product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any spe- cific commercial product, process, or seMa by trade name, trademark, manufac- turer, or otherwise does not necessarily constitute or imply its endorsement, rccom- mendation, or favoring by the United States Government or any agency thereof. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Government or any agency thereof. DISCLAIMER Portions of this document may be illegible in electronic image products. Images are produced from the best available original document. , Structural PolyslllcoFcI] SacriRcial Oxlde SI,N, - Sillcon Substrate Figure 3. Composition of alternating layers of polysilicon and sacrificial oxide used in the SUMMIT-IV Technology. The SUMMiT process was developed to be compatible with a wide range of standard MEMS components. For example, by using a ground plane (poly 0) and a single layer of mechanical polysilicon (poly l), one could create an electrostatic comb drive or scratch drive for actuation. By adding a poly 2 layer to the process, one can create a gear mechanism constrained to rotate on a hub, as well as out-of-plane mirrors and hinges [3]. By adding a CMP step to planarize the third sacrificial oxide layer, and a third mechanical layer of polysilicon, one can form linkages between actuators and output gears, as well as components for a wide array of micro-mechanical, optical and fluidic systems'. A major program driving the development of the SUMMiT process is the stronglink micromechanical lock, used for weapon safety applications. At the heart of the stronglink is a set of electrostatically driven microengines [4], which are formed by connecting orthogonal comb drives through linkages to an output gear, which is capable of delivering moderate amounts of torque to a load. The top speed of the microengine has been measured at 300,000 rpm, using a -90V amplitude drive signal tailored for the microengine [SI. To increase the torque at the expense of speed, a micro-transmission was developed [6] using a set of 3:l and 4:l reduction gears. By cascading several of these 12:l gear trains, a gear reduction ratio of 3 million to 1 was recently demonstrated, with a corresponding increase in torque. By incorporating a rack and pinion assembly to convert rotational to linear motion, controllable step sizes as small as 0.8 nm have been realized. Figure 4 shows a component of the stronglink in The SUMMiT-IV process, as well as the Integrated Technology (discussed later), is available to the public through our Agile Prototyping Program, allowing researchers to fabricate state-of-the-art MEMS designs in a well characterized, base-line technologies. More information is available at http:/ !w.mdl. sandia. gov/Micromachine which a microengine, micro-transmission and a rack and pinion assembly are used to drive a polysilicon mirror out of plane. The benefits of CMP in the SuMMiT-IV technology are clearly evident for this type of system, resulting in smooth optical surfaces on the polysilicon mirrors. It is noted that the basic elements used in the Stronglink system can be adopted for a wide range of h4EMS applications. Additional devices fabricated using the SuMMiT-N technology include deformable piston mirror arrays for phase detection and modulation [3], as well as optical shutters for lasers and fiber optic applications. Figure 4. Polysilicon mirror driven out of plane using a microengine, microtnnsmission and rack and pinion assembly. SUMMiT-V TecJinology The need for greater hctionality in the Stronglink design, led to the recent development of the SuMMiT-V Technology. This process includes several additional steps to the SuMMiT- IV Technology, including an additional sacrificial oxide layer and a second CMF' step as well as a fifth mechanical layer of polysilicon (including a ground plane). The goal of this work was to include a 24-bit mechanical discriminator to the Stronglink design, which when accessed could direct an optical data signal using two opposing polysilicon mirrors. Thus, the additional layer of polysilicon allows for the fabrication of a range of critical features such as a linear pin-in maze discriminator, as well as gear trains on moveable platforms [7]. Figure 5 is a schematic of the most recent Stronglink design, showing one half of the complete system. This award winning design [8] is considered to be the most complex, filly actuated, surface micro-machined system fabricated to date. I I Using the additional flexibility of the dramatic increase the z-axis stiffness of the support SUMMiT-V technology, many of the standard springs. In addition, .advanced designs for the components developed in the SUMMiT-IV microengine linkage assembly were implemented technology were completely redesigned. This to reduce the deleterious effects of stiction PI. As includes electrostatic comb drives used in the with the SUh4MiT-IV process, several annealing microengine, which benefit from stacking several steps are included in this technology to reduce mechanical layers of polysilicon, leading to a stress in the polysilicon and sacrificial oxide layers. Figure 5. Latest generation Stronglink micromechanical lock system fabricated using the SUMMiT-V Technology, incorporating several standard components redesigned for the new technology (one half of complete system). Integrated MEMS Technologv A significant improvement in device functionality, and a high level of integration.can be obtained by integrating the control circuits and h4EMS devices on the same silicon chip. In some cases in which the input stimuli produce low-level signals, as with certain types of capacitive sensors, the sense and control electronics have to be integrated on-chip so as to reduce parasitic noise fiom interconnects. Previous attempts to integrate MEMS and CMOS have tried to process the MEMS devices after the CMOS [9], using refractory metals that can withstand the high temperature annealing cycles required to relieve stress in structural polysilicon. Still other approaches have tried to interleave the necessary MEMS processing steps with the CMOS steps [lo], leading to a rigid, constrained process flow. Sandia has developed a novel approach toward integrating surface micromachined components with the conventional CMOS circuits, by first fabricating the MEMS components, and then continuing with conventional CMOS processing. Since the surface topology of typical MEMS devices (2-6pm) is significantly different than that of conventional CMOS circuits (1-2 pm) the MEMS components are fabricated in a shallow '(-5 p) trench etched into the wafer surface. Upon completion of the MEMS devices, the trench is backfilled with sacrificial oxide, planarized by CMP, and capped with a silicon nitride membrane. After a stress relief annealing cycle, the wafer is ready for conventional IC processing. n , The additional thermal budget of CMOS processing has a negligible effect on the MEMS devices, and can in fact hrther lead to a reduction of built-in stress. To release the MEMS portion of the system, the CMOS circuits are protected with photoresist, and the nitride membrane and sacrificial oxide are removed in buffered HF [l 11. At the present time the integrated process employs two layers of polysilicon (including the ground plane), with a four-layer process currently under development. A cross section of a microsystem during fabrication is shown in Figure 6.  The h4EMS and CMOS components are fabricated in a 6 pm, arsenic-doped epilayer. Electrical interconnects between the CMOS circuitry and MEMS are through polysilicon studs which are at the height of the wafer surface and are connected to the MEMS groundplane (MM Poly 0). It is noted that with Sandiab modular approach towards integration, any type of microelectronic processing can be undertaken, including techniques to fabricate radiation-hard circuits and Bipolar and BiCMOS circuits. The integrated MEMS/CMOS process has been well received by the semiconductor industry, having recently been awarded an R&D 100 award as one of the 100 most technologically significant new products of the year- Analog Devices Inc. has licensed Sandiab Integrated Technology for their next generation inertial sensors. In collaboration with researchers at the Berkeley Sensor and Actuator Center (BSAC), several advanced prototype accelerometers and oscillators have been fabricated in the Integrated Technology [12,13]. One of the recent results from this collaboration with BSAC was a six-degree of- freedom Inertial Measurement Unit (IMU), incorporating a 3 axis accelerometer and XY-  and Z-axis gyroscope [14], for a small, self-contained navigational system. Figure 7 shows the layout of the MU,  incorporating the accelerometer, gyrob and on-chip control circuitry, in a circuit less than 1 cm2. Initial measurements on the individual components show that the +/- 25g accelerometer demonstrated an in-plane axis rms noise floor of 1 10 pg/dHz and an 84 dB dynamic range at 100 Hz bandwidth [IS]. Further testing on the complete system is currently underway. SNL Integrated Micromechanical I CMOS CMOS Device Area Micromechanicat Device Area 4 > t ? Figure 6. Integrated MEMSKMOS Technology developed at Sandia National Laboratories for the monolithic integration of CMOS control circuits and MEMS sensors and actuators, on the same silicon chip. To handle the differences in surface topography, the MEMS components are fabricated in a shallow trench below the wafer surface proior to CMOS processing. VI. References XYZ Accelerometer t XY-Axis Gyro- 4 1 cm- Figure 7. Six degree of freedom micro-navigational system fabricated in SandiaS MEMSICMOS Integrated Technology (Design by U.C. Berkeley). N. Conclusions Micromachined systems are poised to have a far reaching impact on the capabilities and feasibility of future space missions. By performing tasks in the microworld, payload costs are significantly reduced, and reliability could be dramatically improved through the use of inexpensive redundant systems fabricated en masse using conventional integrated circuithurface micromachining technology. Sandia National Laboratories is leading the way in MEMS technology development with it3 baseline SUMMiT-IV process, and it3 advanced 5-level polysilicon SUMMiT-V process. By further integrating h4EMS sensors and actuators with CMOS circuits in the Integrated Technology, Sandia is establishing a new paradigm for micromachined systems-on-a-chip. V. Acknowledgements The authors would like to 'thank the personnel at the Microelectronics Development Laboratory at Sandia National Laboratories for device fabrication. Sahdia National Laboratories is a multiprogram laboratory operated by the Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy under Contract DE-AC04-94AL85000. 1. Internal measurements made at Sandia National Laboratories. 2. J. J. Sniegowski, SPIE Micromachining and Microfabrication Process Technology, Austin, TX, 3. J. H. Comtois, M. A. Michalicek, and C. C. Baron, (Invited Paper) 43rd International Instrumentation Symposium, Instrument Socieg of America, 1997, pp. 169-178. 4. J. Garcia, J. J. Sniegowski, Sensors and Actuators A, Vol38, no. 3, pp. 203-214. 5. S. L. Miller, J. J. Sniegowski, G. LaVigne, and P. J. McWhorter, Proc. SPIE Smart Electronics and m M S  Vol. 2722, San Diego, Feb. 28-29, 1996, 6. J.J. Sniegowski, E.J. Garcia, IEEE Electron Device Lett. Vol 17, no. 7, p 366-368 (1996). 7. M. Steven Rodgers, J. J. Sniegowski, Proceedings of the 1988 Solid State Sensor and Actuator Workshop, Hilton Head Island, South Carolina, pp. 144-149. 8. M. Steve Rodgers, Design Navs, March 2, 1998. 9. W. Yun, R. Howe, P. Gray, Proc. Of the IEEE Solid State Sensors and Actuator Workshop (1 992), pp. 126. 10. W. Kuehnel, S .  Sherman, Sensors and Actuators, Vol. 45, no. 1, pp.7-16 (1994). 11. J. H. Smith, S. Montague, J. J. Sniegowski, J. R. Murray, P. J. McWhorter, Proc. I995 IEDM, 12. M. A. Lemkin, B. E. Boser, D. Auslander, and J. H. Smith, 1997 International Conference on Solid-state Sensors and Actzrators, Chicago, L, June 16-19, 1997, Vol. 2, pp. 1185-1188. 13. T. A. Roessig, R. T. Howe, A. P. Pisano, and J. H. Smith, 1997 International Conference on Solid- State Sensors and Actuators, Chicago, IL, June 16- 14. J. Allen, R. D. Kinney, J. Sarsfield, M. R. Daily, J. R. Ellis, J. H. Smith, S .  Montague, R. T. Howe, B. E. Boser, R. Horowitz, and A. P. Pisano, M. A. Lemkin, W. A. Clark, T. Juneau, Position Location and Navigation Symposium (PLANS '98), Rancho Mirage, CA, April 20-23,1998. 15. M. Lemkin, M. Ortiz, N. Wongkomet, B. Boser, and J. Smith, Proc. ISSC 1997, pp. 202-203. Oct. 14, 1996, Vol. 2879, pp. 104-1 15. ' pp. 197-204. pp. 609-612. 19, 1997, Vol. 2, pp. 859-862. 

Micromachined systems-on-a-chip: Infrastructure, technology and applications

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Micromachined systems-on-a-chip: Infrastructure, technology and applications

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