With the rapid growth of AMD as a competitor in the CPU industry, it is
imperative that high-performance and architectural engineers analyze new AMD
CPUs. By understanding new and unfamiliar architectures, engineers are able to
adapt their algorithms to fully utilize new hardware. Furthermore, engineers
are able to anticipate the limitations of an architecture and determine when an
alternate platform is desirable for a particular workload. This paper presents
results which show that the AMD "Rome" architecture performance suffers once an
application's memory bandwidth exceeds 37.5 GiB/s for integer-heavy
applications, or 100 GiB/s for floating-point-heavy workloads. Strong positive
correlations between memory bandwidth and CPI are presented, as well as strong
positive correlations between increased memory load and time-to-completion of
benchmarks from the SPEC CPU2017 benchmark suites.Comment: Very, very early draft for IEEE SoutheastCon 2017, 9 pages (need to
get down to 8), 6 figures, 7 table