GaAs Junction Field Effect Transistors (JFETs) have attracted renewed attention for low-power, low-voltage electronics. JFETs have a significant advantage over MESFETs for low-power operation due to their higher gate barrier to current flow resulting from p/n junction gate. This paper reports recent advances in an all ion implanted self-aligned GaAs JFET with a gate length down to 0.3 {mu}m. By employing shallopw SiF implants next to the gate, dielectric sidewall spacers, and 50 keV source and drain implants, JFETs with a f{sub t} up to 49 GHz with good pinchoff and subthreshold characteristics have been realized. In addition, the JFET benefits from the use of shallow Zn or Cd implantation to form abrupt p{sup +}/n gate profiles
