The planarization technology of Chemical-Mechanical-Polishing (CMP), used for the manufacturing of multi-level metal interconnects for high-density Integrated Circuits (IC), is also readily adaptable as an enabling technology in Micro Electro Mechanical Systems (MEMS) fabrication, particularly polysilicon surface micromachining. CMP not only eases the design and manufacturability of MEMS devices by eliminating several photolithographic and film issues generated by severe topography, but also enables far greater flexibility with process complexity and associated designs. Thus, the CMP planarization technique alleviates processing problems associated with fabrication of multi-level polysilicon structures, eliminates design constraints linked with non-planar topography, and provides an avenue for integrating different process technologies. Examples of these enhancements include: an simpler extension of surface micromachining fabrication to multiple mechanical layers, a novel method of monolithic integration of electronics and MEMS, and a novel combination of bulk and surface micromachining
