Comparison of Si{sub 3}N{sub 4} deposition techniques for use in particle removal experiments

Abstract

As device critical dimensions decrease in size it becomes increasingly important to remove particles from the wafer surface so they do not impact device yield. A typical method to evaluate various cleaning techniques is to deposit silicon nitride (Si{sub 3}N{sub 4}) particles on the wafer surface and then process the wafers through the desired cleaning processes. The National Technology Roadmap for Semiconductors specifies the standard challenge for percent particle removal from silicon wafers to be based on > 1,000 nitride particles added to the wafers. However, it does not specify the deposition technique to be used for the Si{sub 3}N{sub 4} particles. Two common methods used to deposit Si{sub 3}N{sub 4} on silicon test wafers are the aerosol deposition technique or the wet dip deposition technique. A comparison between these two Si{sub 3}N{sub 4} deposition methods to determine if these methods create an equivalent particle removal challenge has not been reported in the literature to date. In this paper the authors compare these two deposition techniques. They found advantages and disadvantages for both deposition methods. The preferred method for particle deposition is dependent on the specific application