This paper presents a novel fully integrated ultra-low voltage DC-DC converter and its multi-stage architecture. DC-DC converter frequency has been analytically derived using model analysis and validated in Cadence environment. The proposed voltage quadrupling LC tank oscillator eliminates the buffer circuits utilized in the traditional DC-DC converter, hence improves the performance metrics such as efficiency and output power capacity. The circuit was designed in 180nm standard CMOS process and was simulated to self-start and boost 70 mV to deliver 1.4 V to a 1 M Omega load. The minimum start-up voltage of the DC-DC converter is 60 mV. The optimized 2-stage DC-DC converter can yield 1.1 V output and 560 mu W load power with 43% peak efficiency at 0.2 V input. The 3-stage and 4-stage can deliver 1524 mu W and 1193 mu W load power, 1.64 V and 2.18 V output voltage with 40% and 34% peak efficiency respectively at 0.2 V input
