This paper proposes a design procedure of an LCL compensation circuit for a capacitive power transfer (CPT) system. The design enables the achievement of load independent zero phase angle (ZPA) operation in order to increase the overall efficiency of the system by using a minimum number of compensation components. The proposed approach is supported and validated by circuital simulations and confirmed by the results of experimental tests carried out on a specifically designed prototype

Abdullah, Ahmed

Crovetti, Paolo

Ferreyra, Fabio

Musolino, Francesco

Pavone, Mario

English

PORTO@iris (Publications Open Repository TOrino - Politecnico di Torino)

29 November 2022POLITECNICO DI TORINORepository ISTITUZIONALEDesign and efficiency analysis of an LCL Capacitive Power Transfer system with Load-Independent ZPA / Musolino,Francesco; Abdullah, Ahmed; Pavone, Mario; Ferreyra, Fabio; Crovetti, Paolo. - ELETTRONICO. - (2022). ((Interventopresentato al convegno 24th European Conference on Power Electronics and Applications (EPE'22 ECCE Europe)tenutosi a Hannover (Germany) nel 05-09 September 2022.OriginalDesign and efficiency analysis of an LCL Capacitive Power Transfer system with Load-Independent ZPAPublisher:PublishedDOI:Terms of use:openAccessPublisher copyright(Article begins on next page)This article is made available under terms and conditions as specified in the  corresponding bibliographic description inthe repositoryAvailability:This version is available at: 11583/2972753 since: 2022-11-02T16:48:18ZIEEEDesign and efficiency analysis of an LCL Capacitive Power Transfer systemwith Load-Independent ZPAFrancesco Musolino (*), Ahmed Abdullah (*), Mario Pavone (**),Fabio Ferreyra (*), Paolo Crovetti (*)(*) POLITECNICO DI TORINO (DET)Corso Duca degli Abruzzi, 24, 10129Torino, Italy(**) STMicroelectronics SrlStradale Primosole, 50, 95121Catania, ItalyPhone: +39 011 090 4166Email: francesco.musolino@polito.itURL: https://www.polito.it/Keywords≪Contactless Power Supply≫, ≪Current Source DC-DC≫, ≪DC-DC Converter≫, ≪Efficiency≫.AbstractThis paper proposes a design procedure of an LCL compensation circuit for a capacitive power transfer(CPT) system. The design enables the achievement of load independent zero phase angle (ZPA) operationin order to increase the overall efficiency of the system by using a minimum number of compensationcomponents. The proposed approach is supported and validated by circuital simulations and confirmedby the results of experimental tests carried out on a specifically designed prototype.IntroductionCapacitive power transfer (CPT) is a method of delivering power without electric wires, through time-varying electric fields between two metallic plates forming a capacitance. The simple, light and cheapinterface makes this technology an interesting alternative to the inductive power transfer (IPT) [1]. In ad-dition, since electric fields can pass through metal materials without generating significant power losses,this technology is being actively studied for electric vehicle charging applications [2].In charging applications, a constant current (CC) or constant voltage (CV) charging profile depending onthe battery state of charge (SoC) is desirable to ensure its safety and durability [3]. A desirable feature inbattery charger is the zero phase angle (ZPA) between the inverter output current and voltage, to reducethe volt-ampere rating and to enable soft-switching operation. This condition should be ensured for theentire charging profile, in other words, ZPA operation must be load independent [4].According to [5], at least three passive components are required to obtain load independent ZPA oper-ation with CC or CV output. In this article, an LCL compensation network is proposed, and a designprocedure to obtain a CC output with load independent ZPA operation is given. The LCL network isable to improve the power delivered to the load and the power transfer efficiency [6]. In addition, adc-dc efficiency analysis is performed [7], in which an analytical expression of the system efficiency asa function of the load is developed.The proposed approach is validated both through circuital simulations and experimental tests. To thispurpose, a prototype that include a half-bridge inverter and the LCL network designed to achieve ZPAas described in this paper is tested and measurement results are compared to those obtained by thesimulations showing good agreement.Load-independent ZPA operation analysisFig. 1 shows the proposed topology, which is composed of a half-bridge inverter (M1, M2), a diodebridge rectifier (D1 through D4) and a resonant network. This network consists of the LCL compensator(L1, C2 and L2) and the interface capacitors (Cint1 and Cint2).IMOSVDCCinCinM1M2L1Cint1 L2C2Cint2D1 D2D4D3RLCoVinFig. 1: CPT system with LCL compensatorThis system can be simplified as shown in Fig. 2, using the fundamental harmonic approximation (FHA)[8] [9].VinL1Cint1 L2ReCint2C2Fig. 2: Equivalent linear circuitTo this purpose, in what follows Vin is the fundamental component of the inverter output, which is as-sumed to be a pure sinusoidal with magnitude equal to:Vin =2VDCπ(1)and Re is the equivalent resistance of the load with rectifier, calculated as:Re =8π2RL (2)To obtain ZPA operation, the reactive part of the input impedance seen by Vin, Zin = Rin + jXin must bezero. By circuit analysis, the reactance is found to be:Xin =R2eω0L21L1 +L2R2e +(ω0L22L1 +L2)2 − 1ω0C1 (3)C1 is the series combination of the interface capacitances:C1 =Cint1 ·Cint2Cint1 +Cint2(4)ω0 is the resonance frequency:ω0 =1√C2Lp(5)where Lp = L1 ∥ L2.According to (3), C1 can be designed to achieve zero input reactance. Simply solving this equation forC1 and selecting interface capacitors to obtain the required capacitance would not lead to a robust design,since the input reactance is load dependent, and consequently ZPA operation as well.However, based on (3), load independent ZPA operation must be gauranteed when the following inequal-ity is satisfied:R2e ≫(ω0L22L1 +L2)2(6)If this is true, then the much smaller term is neglected with respect to R2e in the denominator of (3),making the input reactance approximately load independent,Xin ≈ω0L21L1 +L2− 1ω0C1(7)C1 =L1 +L2(ω0L1)2(8)Under such condition, for (8), Xin is effectively cancelled for any load and consequently load independentZPA operation can be obtained for a particular frequency.Design procedureA design procedure for the CPT converter of Fig. 1 with load independent ZPA operation is proposed inthis section. The specifications of the proposed system are given in Table I. The design of the systemconsists of calculating the components of the compensation network, to obtain the load independent ZPAoperation previously explained and to fulfill the output requirements. By circuit analysis, the circuit isproven to work as a current source. Therefore, it makes sense to express the output requirements in termsof current rather than power, using Po = I2o RL.Simplified equations to calculate the component values can be obtained by considering the assumptionL1 ≫ L2. The design begins with the calculation of the inductance L2, to obtain the required outputcurrent according to the following equation:L2 =4π2VDCω0Io(9)The (6) is assumed to be:R2e = 10×(ω0L22L1 +L2)2(10)Using (2), the (10) is solved for the inductance L1 to guarantee ZPA condition for loads as low as RL,min:L1 =π2√108ω0L22RL,min(11)Once both inductances are calculated, the equivalent capacitance of the capacitive interface is designedto compensate the input reactance, as shown in (8). Finally, C2 is calculated to make the system resonantat the working frequency, expressed in (5):C2 =1ω20Lp(12)Based on the specifications of Table I, the passive components computed using conventional design forRe = 12 Ω are shown in Table II. Applying the above procedure to get load independant ZPA operation tothe same specifications of Table I, the optimal normalized passive components along with parasitics [10]are shown in Table III. The value of interface capacitors are not kept equal in order to have equivalentcapacitance more closer to the computed value which is 55.04 pF.Table I: System specificationsParameter ValueVDC 60 Vf 1 MHzPo 4 WRL 15 ΩRL,min 3 ΩTable II: Conventional passivecomponentsComponent ValueL1 50 µHL2 7.74 µHCint1−2 1436 pFC2 3.76 nFTable III: Optimal normalizedpassive componentsComponent ValueL1 470 µHDCRL1 3 ΩL2 10 µHDCRL2 0.08 ΩCint1 100 pFCint2 120 pFESRCint 0.05 ΩC2 2.7 nFESRC2 0.025 ΩRds,on 0.03 ΩSimulation resultsThe circuit shown in Fig. 1 has been simulated in MATLAB/Simulink for the components value specifiedin Table II and Table III and the corresponding results are reported in Fig. 3. This is observed in Fig. 3awhere the phases of the input impedance Zin for three different loads Re, i.e., 10 Ω, 12 Ω and 14 Ω areshown. The zero phase angle condition is achieved at different frequencies for each load. If the systemworks at a frequency of 1 MHz, only the curve for Re =12 Ω achieves ZPA condition, meaning that onlyfor this load soft switching is obtained, which is verified in Fig. 3c where the transistor currents areshown for the same three loads.However, in Fig. 3b, there are zero phase input reactances at a frequency of 978 kHz for all three loads.The resonant frequency is obtained at 978 kHz instead of 1 MHz since the normalized component valuesare little different from the computed values. The load independent soft switching operation is achievedat this working frequency, as seen in Fig. 3d where the transistor currents for the same three loads areshown.0.8 0.9 1 1.1 1.2·106−50050f [Hz]Z in[◦]Re=10ΩRe=12ΩRe=14Ω(a) Load dependent phase angle0.8 0.9 1 1.1 1.2·106−50050f [Hz]Z in[◦]Re=10ΩRe=12ΩRe=14Ω(b) Load independent phase angle0 0.5 1 1.5 2·10−6−0.4−0.200.20.4t [s]I MOS[A]Re=10ΩRe=12ΩRe=14Ω(c) Load dependent transistor current0 0.5 1 1.5 2·10−6−0.4−0.200.20.4t [s]I MOS[A]Re=10ΩRe=12ΩRe=14Ω(d) Load independent transistor currentFig. 3: Simulation results for load dependent and independent input reactance phase angle (a), (b), and loaddependent and independent transistor current (c), (d)Experimental setup and resultsIn order to validate the proposed design procedure, a prototype has been implemented and its perfor-mances have been experimentally characterized and compared to simulations. The schematic of the testsetup is shown in Fig. 4a. It includes an EPC9006C development board [11] implementing the half-bridge with EPC2007C GaN enhancement mode field effect transistors (FET) (Q1, Q2). The input to thehalf-bridge is VDC which can take a maximum value of 100 V. The board also contains the FET driver cir-cuit, i.e., LM1553 gate-driver which is driven by VDD = 7 V to 12 V and pulse-width modulation (PWM)circuit whose input is PWMIN which can be maximum +6 VPP, 6 MHz square-wave signal [11]. The LCLnetwork components designed to obtain ZPA operation as explained in previous section, are mounted ona breadboard and connected to the EPC9006C development board as shown in Fig. 4a (Vin port). At theoutput, the equivalent resistance Re described in the previous section (see eq.(2)) is considered instead ofdiode bridge rectifier.The picture of the test setup is shown in Fig. 4b. The EPC9006C development board is mounted on thebreadboard alongwith LCL network components specified in Table III. The potentiometer whose rangeis 0 to 50 Ω is placed and connected to the output through wires. The VDD = 8 V to the driver circuit andVDC = 60 V to the half-bridge inverter is provided by DC power supply [12]. The +5 VPP, 1 MHz square-wave signal is given to PWMIN by signal generator [13]. The input voltage and current (Vin, Iin) andrespective output voltage and current (Vo, Io) waveforms are taken on the oscilloscope [14] for variousloads at different frequencies.Since the real component values are slightly different from the nominal values, so the resonant frequencyis obtained at 987 kHz instead of 978 kHz. At this frequency, the load is varied from 1 Ω to 30 Ω. Itcan be noted that the zero-phase angle operation is maintaned for all the loads above RLmin . For threedifferent loads, i.e., 10 Ω, 12 Ω and 14 Ω, the input phase is measured at all the frequencies ranging fromLM1553Gate DriverGate Driver RegulatorHalf-BridgeLogic and Dead-timeAdjustL1Cint1 L2ReCint2C2EPC9006C Development Board LCL NetworkRectifier Equivalent CircuitVDDPWMINVDCGNDOUTSignal GeneratorSquare wave+5 Vpp, 1 MHzDC Power Supply7-12 VDC Power Supply60 VIinVin VoIoQ1Q2(a)EPC9006CDevelopment BoardPotentiometerSignal GeneratorOscilloscopeDC Power SupplyLCL Network(b)Fig. 4: Experimental test setup of the LCL CPT system with load-independent ZPA operation (a) Test setupschematic (b) test setup picture.0.8 MHz to 1.2 MHz. The input phase versus frequency plot is generated and is reported in Fig. 5a. It isshown that, all three loads have almost zero-phase at working frequency. The phase difference increasesfor higher frequencies and symmetricaly decreases for lower frequencies.Since, the transistor current (IMOS) flows inside the EPC9006C board, so it can not be directly measured.However, we can measure the input current (Iin). The IMOS is exactly the same as the Iin for the case whenVin = 60 V and zero when Vin = 0. Post processing of the current waveform Iin is perfomed in order toplot the IMOS current and compare it to that shown in Fig. 3d. The resulting transistor currents are shownin Fig. 5b which verifies the ZPA operation for the same three loads (10 Ω, 12 Ω and 14 Ω).Efficiency analysisIn this section, the efficiency of the CPT system is studied. The efficiency depends on the losses of thedevices, which are generated by parasitics specified in their datasheets, and are sometimes difficult toestimate. Therefore, to obtain a simple model, the following simplifications are considered:• The losses generated by the passive components are represented by a series resistor (DCR for theinductors, ESR for the capacitors)• The losses generated by the MOSFETs are modelled with a series resistor (Rds,on) and by a constantcontribution due to the gate capacitance0.8 0.9 1 1.1 1.2f [MHz]-50050∠Zin [o]Re = 10 Re = 12 Re = 14 (a) Load independent phase angle0 0.5 1 1.5 2 2.5t [s] 10-6-0.4-0.20.20.4Re = 10Re = 12Re = 14I MOS [A]0(b) Load independent transistor currentFig. 5: Experimental results for load independent input reactance phase angle (a) and load independent transistorcurrent (b)• The losses generated by the Schottky diodes are caused by the forward voltage drop, VFIn this way, the losses on all the devices are modelled using parameters specified in their datasheets. Thegoal is to obtain an analytical expression to represent the system efficiency as a function of a certainoutput quantity, such as the load. To this purpose, the efficiency is expressed as:η =PoPo +∑i PLoss,i(13)If the output power is expressed as Po = I2o RL, and the losses on the many devices are calculated with thesimplifications considered, the efficiency can be expressed as follows:η =RLα+RL +βR2L(14)where α and β are parameters that depend on component values and their parasitics, and are calculatedby circuit analysis as shown below.α =π28(DCRL2 +ESRC2 +4VFω0LPVDC+VgsQg f(πω0LpVDC)2)(15)β =8(πω0Lp)2(DCRL1 +2ESRCint +Rds,on) (16)With this model, the efficiency is represented as a function of the load, and efficiency versus load curvesare developed. Selecting real components for Table III, the curves of Fig. 6 are generated both throughcomputations and measurements. It is seen that the both curves are in close agreement to each otherachieving a maximum of around 92% through computations (continuous line in Fig. 6) and 83% throughmeasurements (dashed line). However, for the higher loads, there is a difference in the curves which isdue to the fact that the proposed efficiency model doesn’t take in to account the AC losses of the inductorwhich are high for higher loads, since the input current is high.ConclusionA design procedure for a CPT system using the LCL topology is explained in this article. This topologyis able to provide a CC output with load independent ZPA operation, using just three passive components.In addition, the dc-dc efficiency is studied, and the system is expected to provide an efficiency of around83% at nominal load. Effectiveness of the proposed procedure has been validated experimentally.0 5 10 15 20 25 30RL[ ]0.30.350.40.450.50.550.60.650.70.750.80.850.90.951MeasuredComputedFig. 6: Efficiency versus loadReferences[1] M. M. El Rayes, G. Nagib, W. G. Ali Abdelaal, “A Review on Wireless Power Transfer,” InternationalJournal of Engineering Trends and Technology (IJETT), vol. 40, no. 5, Oct. 2016.[2] Chris Mi, “High Power Capacitive Power Transfer for Electric Vehicle Charging Applications” in Proc. 6thInternational Conference on Power Electronics Systems and Applications (PESA), 2015, pp. 1-4.[3] G. Buja, M. Bertoluzzo, and K. N. Mude, “Design and experimentation of WPT charger for electric city car,”IEEE Trans. Ind. Electron., vol. 62, no. 12, pp. 7436–7447, Dec. 2015.[4] Su, YG;, Xie, SY.: “Capacitive Power Transfer System With a Mixed-Resonant Topology for Constant-Current Multiple-Pickup Applications,” IEEE Trans. Transp. Electrif., vol. 32, no. 11, pp. 8778-8786, Nov.2017.[5] Lu, J., Zhu, G., Lin, D., Zhang, Y., Jiang, J., Mi, C.C., “Unified Load-Independent ZPA Analysis and Designin CC and CV Modes of Higher Order Resonant Circuits for WPT Systems,” IEEE Trans. Transp. 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Design and efficiency analysis of an LCL Capacitive Power Transfer system with Load-Independent ZPA

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Design and efficiency analysis of an LCL Capacitive Power Transfer system with Load-Independent ZPA

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