Substrate Current Evaluation for Lightly and Heavily Doped MOSFETs at 45 Nm Process Using Physical Models

Abstract

Substrate noise is a major integration issue in mixed signal circuits; particularly at radio frequency (RF) it becomes a key issue. In deep sub micron MOSFETs hot carrier effect induces device degradation. The impact ionization phenomenon is one of the main hot carrier effects. The paper covers the process and device level simulation of MOSFETs by TCAD and the substrate current comparison in lightly and heavily doped MOS. PMOS and NMOS devices are virtually fabricated with the help of ATHENA process simulator. The modeled devices include the hot carrier effects. The MOS devices are implemented on lightly and heavily doped substrates and substrate current is evaluated and compared with the help of ATLAS device simulator. Substrate current is better in lightly doped substrate than in heavily doped one. Drain current is also better in lightly doped than heavily doped substrates. Silvaco TCAD Tool is used for Virtual fabrication and simulation. ATHENA process simulator is used for virtual fabrication and ATLAS device simulator is used for device characterization