Gou, Ruifeng

Tu, Xiaogang

Xiao, Guochun

Zhao, Fangzhou

In the conventional capacitor voltage balancing control of modular multilevel converters (MMC), calculation quantity increases exponentially with the number of sub-modules (SMs). In the application with a great many SMs, it leads great difficulty and high cost to hardware design. To solve the problem, this paper proposed an improved capacitor voltage balancing strategy based on the merge sort to reduce computation quantity evidently. Meanwhile, according to the capacitor voltage variation rule of the nearest level modulation (NLM) method in the ideal condition, the paper optimized the merge sort to further decrease calculation quantity, analyzed variations of capacitor voltages in the non-ideal condition, and proposed a corrected optimized algorithm. In the end, the paper used the DSP controller TMS320F28335 to compare execution time of the sorting algorithms, and results of the optimized method indicate significant reduction of computation quantity. Using PSCAD/EMTDC to establish a 401-level MMC simulation model, validity of the optimized merge sort and the corrected algorithm are verified.</p

A capacitor voltage balancing strategy for MMC based on optimized merge sort

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