Mcewan, Dave

English

Modern System-on-Chips (SoCs) are highly complex systems specified chiefly using digital clocked logic and implemented in silicon circuitry. The applications served by SoC-based products vary from tiny embedded devices to massive supercomputers. A common factor in systems across the scale is that designers require a thorough understanding of component interactions lest they sacrifice unnecessary energy, performance, development time and other important resources.The approach taken in this thesis is via behaviour analysis on key internal signals carrying binary data. Systems with appropriate instrumentation can provide engineers with signals on the workings and interactions of components in stateformat (e.g. transactionIsInflight ) or event format (e.g. transactionInitiated and transactionCompleted ). Gaining an understanding of a system’s runtime behaviour entails uncovering knowledge about key statistics of these signals and, with equal importance, knowledge about the underlying relationships connecting them.Statistical experiments are devised to find which interpretations of the term “correlation” are most useful, and whether individual performance counters can be used effectively for correlation analysis over a single time window. Metrics based on covariance and independence are found to be more useful than those based on sets or geometrical concepts. Individual performance counters are shown to be inadequate for discerning useful correlation information within a single time window; however, the inclusion of at least one pairwise counter enables useful correlation metrics to be calculated. Building upon these results, a hardware design is developed to discover what is required to implement a device for passive on-chip correlation monitoring and data collection. A novel sampling method is developed out of necessity to enable correlation to be detected between signals with a slight but unknown delay, and a novel window function which enables low-cost windowing counters. The correlator device is demonstrated via integration with UltraSoC’s commercial toolkit for embedded analytics in a highly complex multi-core system. It is observed that behaviour analysis involves a large amount of data that is difficult to consume using existing tools and techniques (e.g. time-series plots and tables). This is addressed by tackling the problem of how to effectively present large amounts of correlation data in a way which allows a system designer to comprehend the required statistics without being overwhelmed.This work prepares SoC designers for understanding their system’s behaviour at a theoretical level via a thorough evaluation of correlation metrics, and at a practical level via an exploration of both implementation in digital logic hardwareand novel visualisation techniques to present behaviour

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Behaviour analysis in binary SoC data

https://research-information.bris.ac.uk/files/327317069/Final_Copy_2022_06_22_McEwan_D_PhD.pdf

Behaviour analysis in binary SoC data

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