'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
Abstract
Many beyond-CMOS technologies, based on different switching mechanisms, are arising. Field-coupled technologies are the most promising as they can guarantee an extremely low-power consumption and combine logic and memory into the same device. However, circuit-level explorations, like layout verification and analysis of the circuit performance, considering the constraints of the target technology, cannot be done using existing tools. Here, we propose a methodology to take on this challenge. We present FUNCODE (FUNction & COnnection DEtection), an algorithm that can detect element connections, functions and errors of custom-layouts and generate its corresponding VHDL netlist. It is proposed for in-plane and perpendicular Nano Magnetic Logic as a case study. FUNCODE netlists, which take into account the physical behavior of the technology, were verified using circuits with increasing complexity, from 6 up to 1400 gates with a number of layout elements varying from 200 to 2.3e6