Both 2.5 dimensional (2.5D) and 3 dimensional (3D) stacked integrated chip (SIC) heterogeneous architectures are promising to go beyond Moore's law for compact, high-performance, energy-efficient microsystems. However, these systems face significant thermal management challenges due to the increased volumetric heat generation rates, and reduced surface area. In addition, highly spatially and temporally non-uniform heat generation occurs due to different functionalities of various heterogeneous chips. This dissertation focuses on thermal management challenges for both 2.5D and 3D-SICs, by utilizing micro-gap liquid cooling with enhanced non-uniform heterogeneous pin-fin structures. Single phase convection thermal performance of heterogeneous pin-fin enhanced micro-gap liquid cooling under non-uniform power map has been evaluated under steady state conditions. Heat transfer and pressure drop characteristics of dielectric coolants in cooling manifold with cooling enhanced structure and hergeneous pin-fins have been parametrically studied by full-scale computational fluid mechanics/heat transfer (CFD/HT) to achieve non-uniform cooling capacities for multi-chip test structures of 2.5D-SICs. Non-uniform heterogeneous pin-fin structures in cold plates have been numerically and systematically optimized using design of experiment method, coupling with full-scale CFD/HT simulations. A compact thermal model accounting for both spatially and temporally varying heat-flux distributions for inter-layer liquid cooling of 3D-SICs, with realistic leakage power simulation feature has also been developed as a thermal-electrical co-design tool for 3D-SICs. In addition to the active micro-gap liquid cooling thermal managements, this dissertation also investigates the passive micro-gap two-phase liquid cooling using a miniature-thermosyphon with dielectric coolant Novec 7200, for future 3D-SICs. Experimental characterizations, including heat transfer measurements, and bubble flow visualizations are performed under two phase conditions. Implementation of miniature-thermosyphon on 3D-SICs provides non-uniform in-plane as well as cross-plane cooling capacities, which can be used and further enhanced for 3D-SICs thermal management with heterogeneous chips.Ph.D
