In this paper, an automated dual IPCs 240 system for asymmetric power compensation is designed from an analytical analysis of the power flow modes through the transmission line. Then, the obtained ACL (Automatic Control Logic) consists of serial gates arrays of the standard NAND/AND and OR operators. It has been implemented within the Matlab/Simulink framework, and the obtained simulation results show the feasibility and great relevance of the dual IPCs 240 technology using, in power transmission networks under normal and contingency conditions

Kom, Charles-Hubert

Mandeng, Jean Jacques

Mbihi, Jean

English

CTU Open Journal Systems (Czech Technical University, Prague / České vysoké učení technické v Praze)

Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   32 TELEN2016024    DOI 10.14311/TEE.2017.2.032  Design of an Automated Dual IPCs 240 System for Asymmetric Power Flow Compensation  in an AC Electric Network  Jean Jacques Mandeng 1), Jean Mbihi 2) and Charles-Hubert Kom 3) 1) University of Douala, EEAT Research Laboratory, Douala, Cameroun, e-mail:  phelps1112@yahoo.fr 2) University of Douala, EEAT Research Laboratory, Douala, Cameroun, e-mail:  mbihidr@yahoo.fr 3) University of Douala, EEAT Research Laboratory, Douala, Cameroun, e-mail:  charles_kom@yahoo.fr   Abstract — In this paper, an automated dual IPCs 240 system for asymmetric power compensation is designed from an analytical analysis of the power flow modes through the transmission line. Then, the obtained ACL (Automatic Control Logic) consists of serial gates arrays of the standard NAND/AND and OR operators. It has been implemented within the Matlab/Simulink framework, and the obtained simulation results show the feasibility and great relevance of the dual IPCs 240 technology using, in power transmission networks under normal and contingency conditions. Keywords — AC electric network, contingencies, power flow compensation, automated dual IPCs 240, logic gates arrays, simulation. I. INTRODUCTION The FACTS (Flexible Alternative Current for Transmission Systems) invented since 1988, fall into the wide class of modern electronic technologies, for symmetric power compensation within electric networks, subjected to normal and contingency operating conditions [1–3]. As an example, if a short circuit occurs on a single phase of a power transmission line, then the other unaffected phases would be switched off. However, unlike FACTS, the IPC technology was created earlier since 1974, for asymmetric and passive power compensation under contingencies using standard reactive devices. It has been proven that, if a contingency occurs on one or two phases, a transmission network equipped with an IPC (Inter-phase Power Controller) can continuously deliver to the terminal load a lower amount of power, which is proportional to the number of unaffected phases [4], e. g, 2/3 of the rated power if two phases are active, and 1/3 of the rated power if a single phase remains active. Since 1974, the IPC technology has increasingly received a great attention of both researchers and professionals in electric power networks. As an implication, many pioneering topologies of IPCs are available in the literature, each of which depends on the internal control parameters to be used for passive power compensation. Generally speaking, the commonly used control parameters are either the phase angle of a phase-shifting transformer (e.g. IPC 60 and IPC 20), or the susceptances of reactive devices (e.g. IPC 240) [5–8]. As shown in Fig. 1, the topology of a generic IPC 240 consists of two parallel branches of reactive elements, with conjugated values of impedances at the fundamental frequency. In most applications encountered in the literature, a single IPC 240 is installed between the power source and power receiver. As a great weakness, any degraded power transmission mode due to one-phase or two-phase contingencies, permanently delivers an unbalanced AC power to the receiving side. Thus, most three phase loads cannot be used under contingencies.  Vs_X :  Source voltage of  phase X Є {A, B, C} Vr_A :  Phase A voltage in the receiver side ψ1 = −120 °:  Angle from phase C to phase A ψ2  = 120 ° :  Angle from  phase B to phase A γ21 = ψ2 – ψ1 = 240 °:  Characteristic angle of the IPC δsr : Load angle  B1 = −B2:  Conjugated reactances (a)  One-line diagram of a generic IPC 240  (b)  Phase diagram of a generic IPC 240 Fig. 1.  Topology of a generic IPC 240. Fortunately, a novel IPC 240 with three branches, has been studied recently, and applied under a dual IPCs topology to the asymmetric power compensation within an electric network [9]. However, although high quality results were obtained when simulating the whole power compensated network under a dual IPCs 240 system, it is important to mention that the management logic of necessary or unnecessary reactive devices before and Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   33 TELEN2016024    DOI 10.14311/TEE.2017.2.032  during contingency periods, was conducted manually at the expense of an automatic control process as it should be expected in the power flow automation practice. Thus, the aim of this paper is to design and validate an ACL of AC power flow modes under a dual IPCs 240 system. The remaining sections of the paper are organized as follows: In Section II, the fundamentals of IPC 240 with three branches per phase are recalled. Then, in Section III, it is shown how the ACL of a dual IPCs 240 system is designed and implemented within the Simulink framework, from analytical analysis. Furthermore, the results obtained when simulating the proposed ACL are presented in Section IV, and the paper is concluded in section V. II. FUNDAMENTALS OF IPCS 240 WITH THREE BRANCHES A. Single IPC 240 with Three Branches Installed Upstream a Power Transmission Line The one-line diagram of a single IPC 240 with three branches is presented in Fig. 2.  Xaas, Xbbs, Xccs : Serial Reactances  Xbas, Xcas, Xabs, Xcbs, Xacs, Xbcs : Mutual reactances Is_X : Input current of RPI 240 for phase X Є {A,B,C} Ir_X : Ouput current of RPI 240 for phase X Є {A,B,C} (a)  One-line diagram  (The symbol a stands for Fortescue operator) (b)  Reverse sequence compensator (input side) Fig. 2.  Topology of an IPC 240 with three branches. For each reverse sequence compensator at the input side, the following equation should be satisfied:  Xaas + Xbas + Xcas = 0 (1) As an implication, it might be built using either two inductances and a capacitance, or one inductance and two capacitances. Hence, the relations to be used for computing the values of reactances are as follows: a) Currents Is_X_C  in the  reverse sequence      compensator for  X Є {A,B,C}:  Is_A_C = −Is_A/3;  Is_B_C = −Is_B/3; (2)  Is_C_C = −Is_C/3; b) Resistance R2_CI and  reactance X2_CI in the      reverse sequence compensator:  R2_CI = RealPart (Vs_A/(−Is_A_C));  X2_CI = ImaPart  (Vs_A/(−Is_A_C)); (3) c) Serial and interphase reactances of the reverse      sequence compensator (input side):  Xaas = 2 * X2_CI  Xbas =  * R2_CI − X2_CI (4)  Xcas = −  * R2_CI − X2_CI The same reasoning from Eqs. (1) to (4) could be used to obtain similar expressions of the reactances Xaar, Xcar and Xbar at the output side. In (3), Vs_A = Vs∠δsr, δsr being a load angle. Consequently, each inverse sequence reactance defined in (4) given (3), evolves according to a real function of δsr. The graph of functions Xaar (δsr), Xbas (δsr), Xcas(δsr), Xaar(δsr), Xcar(δsr) and Xbar (δsr), obtained using a simple Matlab program from the following set of data {phase voltage Vs = Vr = 225 kV, line impedance = Z = 10.49 + j40.9066, δsr Є [1 °– 26 °]}, are presented in Fig. 3.  Fig. 3.  Graphs of the inverse sequence reactances. In Fig. 3, the following expected facts,   Xaas (δsr) + Xbas(δsr) + Xcas (δsr) = 0  Xaar (δsr) + Xbar(δsr) + Xcar (δsr) = 0 (5) Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   34 TELEN2016024    DOI 10.14311/TEE.2017.2.032  are quite apparent. In addition, a new finding arising from Fig. 3 is that, the variations of the reverse sequence reactances of an IPC 240 with three branches fall into the family of simple exponential or polynomial functions of the load angle δsr. Furthermore, it is important to observe in Fig. 3 that for high values of δsr, the adjustment of reactances can be skipped since they are asymptotically constant. B. Dual IPCs 240 with Three Branches Associated with a Power Transmission Line Let consider in Fig. 4 an AC power transmission network, consisting of a S-IPC (source IPC 240), a transmission line, a R-IPC (receiving IPC) 240, a set of intelligent upstream and downstream circuits breakers (D1 and D4 for phase A, D2 and D5 for phase B, D3 and D6 for phase 3), and an ACL (Automatic Control Logic) to be designed. The discrete reactances of the source IPC 240 are controllable via related switches S1, S2,..., S9. In addition, the similar set of switches S1’, S2’,..., S9’ are associated with reactances of the receiving IPC 240. Therefore, there are eighteen switching reactances to be managed overtime under normal and contingency modes of the power flow through the transmission line, while maintaining synchronism between both IPCs 240. Any phase of the power transmission line which is infected by a high level contingency, e.g. a short circuit, should be switched off by the associated circuit breakers.  The novelty brought by the dual IPCs 240 topology is that, even under high level contingencies, e.g., a single phase or even two-phase short circuit, the receiving IPC 240 with three branches, can permanently provide a three phase power supply to power receiving terminal from a few phases in service if any. Thus, the ACL to be designed is a novel tool with great relevance on a better management of the power flow, in AC power networks under dual IPCs 240 topology. III. DESIGN OF THE ACL FOR A DUAL IPCS 240 SYSTEM  At the preliminary step, it is important to identify the input and output variables to be managed by the ACL of the dual IPC 240 system. Following the information observed in Fig. 4, the main input and output variables involved in that case are summarized in Tab. I.  TABLE I.  SUMMARY OF INPUT AND OUTPUT VARIABLES INVOLVED Symbol Nature Description a, b, c, a’, b’ and c’ Inputs Information data for load angle d1, d2, d3 Inputs ON/OFF state of circuit breakers  (D1, D2 and D3 respectively) d4, d5, d6 Inputs ON/OFF state of circuit breakers  (D4, D5 and D6 respectively) i1, ..., i9  Inputs ON/OFF states of switches S1, S2, ..., S9 respectively s1, ..., s9 Outputs Switching states of line reactances associated with  the S-IPC 240 s1’, ..., s9’ Outputs Switching state of line reactances associated with the  R-IPC 240  It is also important to master main operations and tasks to be automated. In fact, under normal operating conditions (i.e. no contingency), all switching control devices should be initially ON, in  that case the dual IPCs 240 system behaves as a lossless power transmission layer. However, as shown in an illustrative contingency configuration provided in Fig. 4, if a high level contingency occurs in phase A (e. g. phase to ground short  Fig. 4.  Electric power transmission lines equipped with an  automatic  dual IPCs 240 system.Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   35 TELEN2016024    DOI 10.14311/TEE.2017.2.032  TABLE II.  TRUE TABLE OF THE ACL TO BE DESIGNED  Fig. 4.  Contingency in phase A. circuit), then the intelligent circuit breakers D1 and D2 would switch OFF automatically phase A. This information can be captured by the ACL from the state values of d1 and d4, in order to switch ON necessary reactances  (Xaas, Xbas, Xcas, Xbbs, Xccs) and (Xaar, Xaar, Xbbr, Xacr, Xccr), while switching OFF unnecessary ones within the dual  IPCs 240 system.  An analogue reasoning can be conducted for all types of single-phase or two-phase contingencies. As a summary the true table of the ACL to be designed, is presented in Tab. II.  From Tab. II, it is easy to define each output variable Sj (j = 1, 2, ..., 9) as a raw function of combined input variables as follows: 1425361425361425361425361425361        dddddddddddddddS (6) 1425361425361425362 dddddddddS   (7) 1425361425361425363" dddddddddS   (8) 1425361425361425364 dddddddddS   (9) 1425361425361425361425361425365        dddddddddddddddS (10) 1425361425361425366 dddddddddS   (11) 1425361425361425367 dddddddddS   (12) 1425361425361425368 dddddddddS   (13) 1425361425361425361425361425369        dddddddddddddddS (14) Now, given a new combined variable: 14253614253614253614253610        ddddddddddddS (15) Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   36 TELEN2016024    DOI 10.14311/TEE.2017.2.032  Then the straightforward simplified expressions of Eqs. (6) – (15) can be written as follows: 142536101 dddSS    (16) 14253625362 dddddS   (17) 23" SS    (18) 142536143614364 dddddddS   (19) 142536105 dddSS    (20) 46 SS    (21) 14253614257 dddddS   (22) 78 SS    (23) 142536109 dddSS    (24) The set of Eqs. (16) – (24) stands for analytical fundamentals of the ACL for a dual IPCs 240 system   within an AC power transmission network. Unlike most pioneering IPC 240 topologies encountered in the power engineering literature, its novelty relies on the capabilities of the automatically maintaining a balanced AC power supply to the power receiving terminal, even under degraded operating conditions due to the loss of one or two-phases of the transmission line. The schematic diagram of the proposed ACL as implemented in the Matlab/Simulink framework is presented in Fig. 5. For the sake of simulation simplicity, the power flow states d1, d2, d3, d4 and d6 through the transmission line, are generated using an instance of the signal builder tool, with 6 outputs. In addition, the automatic output decision making S1 (S1’), S2 (S2’), ..., S9 (S9’) are visualized using an instance of the virtual scope with 9 channels.  The architectural core of the ACL is built using simple standards logic devices. It consists of two serial logic gate arrays of simple NAND/AND and OR operators as shown in Fig. 5(a) and Fig. 5(b) respectively. Thus, it could be implemented easily for real time applications using FPGA (Field Programmable Gate Array) technology.   Fig. 5.  Logic diagram of the ACL for a dual IPCs 240 system. Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   37 TELEN2016024    DOI 10.14311/TEE.2017.2.032    IV. SIMULATION RESULTS The results obtained when simulating the ACL under a few single contingency modes are presented in Fig. 6. In Fig. 6(a), phase A is affected by a contingency from 4 to 7 time units. Then, the states of the related switches S4, S6,   S7 and S8 shown in Fig. 6(b), are automatically switched ON by the ACL as predicted earlier from Tab. II, and the states of all unnecessary switches are OFF. In Fig. 6(c), a two-phase contingency affects phase A and phase B from 4 to 7 time  units.  As a result shown in Fig. 6(d), the  state Fig. 6.  Behaviour of ACL of switches S1, S2, ..., S9  under  a few  single contingency modes.  Transactions on Electrical Engineering, Vol. 6 (2017), No. 2   38 TELEN2016024    DOI 10.14311/TEE.2017.2.032   Fig. 7.  ACL of switches S1, S2, ..., S9 under a  sequence of power flow states. of switches S1, S2, S4, S4, S5 and S6 are automatically set to OFF whereas the remaining switches S7, S8 and S9 are set to ON. This behaviour deals of the ACL with the predictions in Tab. II. In both cases all switches S1, S2, ..., S9 are set to ON from 7 time units where the states of all contingency indicators return to 1, i.e. during the post contingency period..  In Fig. 7, a more complicated situation is successfully simulated. For example, Fig. 7(a) shows a sample of sequential operating modes generated over ten time units, with the raw input bits d1, d2, d3, d4, d5 and d6. Recall that the combined input bits d14 = d1 d4, d35 = d3 d5 and d36 = d3 d6 return the operating state of phase A, phase B and phase C respectively. From 0 to 2 time units, the normal power flow mode is active since all the state indicators dj (j = 1 to 6) are equal to zero. From 2 to 7 time units, phase A is affected by a contingency since d14 = 0, then from 7 to 8 time units, phase B is also affected by a second contingency, and all contingencies disappear over the remaining simulation time. The output decisions produced by the ACL under the input sequence described above are presented in Fig. 7(b). For each operating mode, the control signal of the switches S1, S2, ..., S9 perfectly match with the behaviour predicted earlier in Tab. II. Numerous additional tests have been successfully conducted in order to validate the proposed ACL for dual IPCs 240 topology in AC power networks.  V. CONCLUSION In this paper, an ACL for a dual IPCs 240 system has been designed and well tested using simulation results. Its use in AC networks as a novel automated power flow compensation technology, could be very relevant. Even though the power transmission line is affected by permanent single-phase or two-phase contingencies, the proposed automated dual IPCs 240 system, provides at the power  receiving side, a few percentage of the rated power flow, when permanently maintaining the balanced nature of the terminal three-phase  supply. However, it would be necessary to test the proposed ACL on a whole virtual scheme of a realistic power transmission system. In addition, it would be also interesting to integrate within the ACL core an adjustment module of reactances in order to match low values of the load angle under contingency periods.  Furthermore, a complete version of a dual IPCs 240 system, could be implemented using the FPGA-based technology for real time applications in the electric power engineering practice. These numerous unsolved problems will be investigated in future research works.  REFERENCES [1] N. G. Hingorani, “FACTS Technology – State of the art, Current challenges and the future prospects”, Life Fellow IEEE, page 3, 2007.  https://doi.org/10.1109/pes.2007.386032 [2] K. R. Padiyar, “FACTS controllers in power transmission and distribution, ”  New age international limited publishers,  pages 24-25, 273-277,  New Delhi, 2007.  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Pelletier, “Interphase power controller with voltage injection”,  IEEE Transactions on  Power Delivery, Volume: 9,  Issue  4, pp. 1956 - 1962, August 2002.                                                  [7] K. Habashi,   J.-J.  Lombard, S. Mourad, P. Pelletier,  “The design of a 200 MW interphase power controller prototype”,  IEEE Transactions on  Power Delivery, Volume 9,  Issue 2 , pp.  1041 - 1048, August 2002. [8] Pourhossein, J., Gharehpetian, G.B.; Fathi, S.H., “Unified Interphase Power Controller (UIPC) Modeling and Its Comparison With IPC and UPFC”, IEEE Transactions on power delivery, Volume 27, Issue, pp.  1956 - 1963, Oct. 2012. [9] J. J. Mandeng, C. H. Kom and J. Mbihi, “Modeling and Simulation of an Electric Power Transmission Line Under Asymmetric Compensation by Dual Inter-phase Power Controllers”, International Journal of Energy Conversion, pp. 111-117, July 2015. 

Design of an Automated Dual IPCs 240 System for Asymmetric Power Flow Compensation  in an AC Electric Network

In this paper, an automated dual IPCs 240 system for asymmetric power compensation, is designed from an analytical analysis of the power flow modes through the transmission line. Then, the ACL (automatic control logic) obtained consists of serial gates arrays of standard NAND/AND and OR operators.  It has been  implemented within Matlab/Simulink framework, and the simulation results obtained show the feasibility and great relevance of using the dual IPCs 240 technology, in power transmission networks  under normal and contingency conditions

Design of an Automated Dual IPCs 240 System for Asymmetric Power Flow Compensation in an AC Electric Network

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Design of an Automated Dual IPCs 240 System for Asymmetric Power Flow Compensation in an AC Electric Network

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CTU Open Journal Systems (Czech Technical University, Prague / České vysoké učení technické v Praze)

CTU Open Journal Systems (Czech Technical University, Prague / České vysoké učení technické v Praze)