PhD ThesisThe behaviour of many systems can be partitioned into scenarios. These facilitate
engineers’ understanding of the specifications, and can be composed into efficient
implementations via a form of high-level synthesis. In this work, we focus on highly
concurrent systems, whose scenarios are typically described using concurrency models
such as partial orders, Petri nets and data-flow structures.
In this thesis, we study different aspects of hardware synthesis from high-level
scenario specifications. We propose new formal models to simplify the specification
of concurrent systems, and algorithms for hardware synthesis and verification of the
scenario-based models of such systems. We also propose solutions for mapping scenariobased
systems on silicon and evaluate their efficiency.
Our experiments show that the proposed approaches improve the design of concurrent
systems. The new formalisms can break down complex specifications into
significantly simpler scenarios automatically, and can be used to fully model the dataflow
of operations of reconfigurable event-driven systems. The proposed heuristics for
mapping the scenarios of a system to a digital circuit supports encoding constraints,
unlike existing methods, and can cope with specifications comprising hundreds of
scenarios at the cost of only 5% of area overhead compared to exact algorithms.
These experiments are driven by three case studies: (1) hardware synthesis of control
architectures, e.g. microprocessor control units; (2) acceleration of the ordinal pattern
encoding, i.e. an algorithm for detecting repetitive patterns within data streams; (3) and
acceleration of computational drug discovery, i.e. computation of shortest paths in large
protein-interaction networks.
Our findings are employed to design two prototypes, which have a practical value for
the considered case studies. The ordinal pattern encoding accelerator is asynchronous,
highly resilient to unstable voltage supply, and designed to perform a range of computations
via runtime reconfiguration. The drug discovery accelerator is synchronous, and
up to three orders of magnitude faster than conventional software implementations