This paper shows the temperature sensitivity of FinFET and the possibility of using FinFET as a temperature Nano sensor based on Fin width of transistor. The multi-gate field effect transistor (MuGFET) simulation tool is used to examine the temperature effect on FinFET characteristics. Current-voltage characteristics with various temperatures and channel Fin width (WF= 5,10,20,40 and 80 nm) are at first simulated, the diode mode connection has been used in this study. The best temperature sensitivity of the FinFET is has been considered under the biggest ∆I at the working voltage VDD with range of 0–5 V. According to the results, the temperature sensitivity increased linearly with all the range of channel Fin width (5-80 nm), also, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V)

Abdul Nasir, Abd Ghafar

Atalla, Yousif

Hashim, Yasir

Jabbar, Waheb A.

This paper shows the temperature sensitivity of FinFET and the possibility of using FinFET as a temperature nano sensor based on Fin width of transistor. The multi-gate field effect transistor (MuGFET) simulation tool is used to examine the temperature effect on FinFET characteristics. Current-voltage characteristics with various temperatures and channel Fin width (WF = 5,10,20,40 and 80 nm) are at first simulated, the diode mode connection has been used in this study. The best temperature sensitivity of the FinFET is has been considered under the biggest ∆I at the working voltage VDD with range of 0–5 V. According to the results, the temperature sensitivity increased linearly with all the range of channel Fin width (5-80 nm), also, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V)

Yousif Atalla

Yasir Hashim

Abdul Nasir Abd. Ghafar

Waheb A. Jabbar

ZENODO

Temperature characteristics of FinFET based on channel fin width and working voltage

UMP Institutional Repository

International Journal of Electrical and Computer Engineering (IJECE) Vol. 10, No. 6, December 2020, pp. 5650~5657 ISSN: 2088-8708, DOI: 10.11591/ijece.v10i6.pp5650-5657      5650   Journal homepage: http://ijece.iaescore.com/index.php/IJECE Temperature characteristics of FinFET based  on channel fin width and working voltage   Yousif Atalla1, Yasir Hashim2, Abdul Nasir Abd. Ghafar3, Waheb A. Jabbar4 1,3,4Faculty of Electrical and Electronics Engineering Technology, University Malaysia Pahang (UMP), Malaysia 2Computer Engineering Department, Faculty of Engineering, Tishk International University (TIU), Iraq   Article Info  ABSTRACT Article history: Received Apr 3, 2020 Revised May 6, 2020 Accepted May 20, 2020   This paper shows the temperature sensitivity of FinFET and the possibility of using FinFET as a temperature nano sensor based on Fin width of transistor. The multi-gate field effect transistor (MuGFET) simulation tool is used to examine the temperature effect on FinFET characteristics. Current-voltage characteristics with various temperatures and channel Fin width  (WF = 5,10,20,40 and 80 nm) are at first simulated, the diode mode connection has been used in this study. The best temperature sensitivity of the FinFET is has been considered under the biggest ∆I at the working voltage VDD with range of 0–5 V. According to the results, the temperature sensitivity increased linearly with all the range of channel Fin width  (5-80 nm), also, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V). Keywords: Channel fin FinFET MOSFET Temperature sensitivity Copyright © 2020 Institute of Advanced Engineering and Science.  All rights reserved. Corresponding Author: Yasir Hashim,  Department of Computer Engineering, Tishk International University (TIU), Kurdistan-Erbil, Iraq. Email: yasir.hashim@tiu.edu.iq   1. INTRODUCTION The industry focus on silicon metal-oxide-semiconductor field effect transistors (MOSFETs) for  the past 6 decades, this has been mainly due to the simplicity of manufacture, inherent scalability and high levels of possible integration [1, 2]. Until now the industry has kept up with Moore’s law [3-5] by making transistors smaller and reducing the distance between them. The problem that arises with reducing size is that the transistor will conduct current even when it turned off and thus consume power. To make the chips with high integration, a new structure of transistors has to be used since old MOSFET structure cannot be reduced further in nano dimension size.  Many new field effect transistor (FET) structures have been extensively explored given that  the metal oxide semiconductor FET (MOSFET) technology has continued to approach its downscaling limits. One of the relatively newer FETs is the FinFET as shown in Figure 1 [6], a transistor-structured FET that is  a popular research topic in the academic field and semiconductor industry [7-9]. The one new promising MOSFET architecture is the FinFET see Figure 1 that have the gate surrounding the channel which gives  a better control and therefore reduces current leaking, one way of creating a FinFET is to use a nanowire as  a channel and build a gate around it. [10-12] The best example of sensors for subsumed electronic applications (i.e. used within equipment) is  the semiconductor temperature sensor [13]. Transistor-based temperature sensors are designed on the basis of the temperature characteristics of current–voltage curves of nanowire transistors [14-20]. A bipolar transistor can be used as a temperature sensor by connecting its base and collector and operating them in diode mode. Similarly, a transistor with MOSFET structure can be used as a temperature sensor by connecting the gate with either the source or drain as shown in Figure 2. Electronic devices, such as diodes, transistors, capacitors Int J Elec & Comp Eng  ISSN: 2088-8708   Temperature characteristics of FinFET based… (Yousif Atalla) 5651 and resistors, with nano-dimensions have recently become popular in the electronics industry due to their extremely small electronic circuits.      Figure 1. FinFET structure [6]  Figure 2. MOSFET as a temperature sensor  (Vg=Vd=VDD)   The performance of new devices, which may correspond to a wide array of new applications, will likely depend on the nano-dimensional characteristics of such devices. The chip generation of these relatively new and powerful electronic devices with ultra-small transistors may be even regarded more trustable when new findings from future research are consolidated. However, the new nano-dimensional FET designs and structures are still considered novel technologies and thus necessitate further study and improvement, and they require further innovations despite the limitations in the field of MOSFET science. So, this research explores the effect of width of Fin of FinFET on the temperature sensitivity of transistor and the possibility of using it as a temperature nono-sensor.   2. METHOD  Electronic device simulation has become increasingly important in understanding the physics behind the structures of new devices. Thus, simulation tools are adopted in this research for the analysis and evaluation of the temperature sensitivity of FinFET. The simulation tool can be supported the research work for further explore and development of nano-dimensional characterisation [21]. Simulation tools can also help identify device strengths and weaknesses and retrenchment costs and illustrate the extensibility of these devices in the nm range [22, 23].  In this study, MuGFET is used as the simulation tool to explore the characteristics of the FinFET transistor. The output characteristic curves of the transistor under deferent environmental conditions and with deferent parameters are considered. The effect of gate Fin width on the temperature sensitivity has been investigated based on the Id–Vg characteristics. MuGFET [24] simulation tool has been used for  the characterization of FinFET with nano-dimensional structure, MUGFET is created and invented at  Purdue University.  MuGFET adopts either PADRE or PROPHET for simulation, both of which were developed by Bell Laboratories. The PROPHET is a partial differential equation profiler for one, two, or three dimensions, and PADRE is a device-oriented simulator for 2D or 3D devices with arbitrary geometry [24, 25]. The software can generate useful characteristic FET curves for engineers to help them fully explain the underlying physics of FETs. MuGFET also provides self-consistent solutions to Poisson and drift-diffusion equations [24, 25] and can be used to simulate the motion of transport objects when calculating FinFET characteristics as shown in Figure 1. This research used a simulation tool, which is called MUGFET. First the suitable parameters and dimensions will be chosen for simulation of FinFET, the data includes dimensions (length channel (Lg), width channel (WF), oxide thickness (Tox), doping concentration in channel, source and drain, and finally  the temperature (T)), Table 1 illustrate all parameters of FinFET that has been used in the simulation,  after simulation complete, the I-V data will have produced depending on parameters entered to the software. Finally, the optimized values were found to optimize the FinFET channel as temperature nano-sensor.                   ISSN: 2088-8708 Int J Elec & Comp Eng, Vol. 10, No. 6, December 2020 :  5650 - 5657 5652 Table 1. Parameters of FinFET used in this study Parameter Values Temperatures T 250, 275, 300, 325, 350, 375 and 400 Ko Working voltage VDD 0–5 V with 0.25 V steps Channel length Lg  85 nm Source and Drain lengths   50 nm Oxide thickness Tox (SiO2) 2.5nm Gate Fin width WF 5,10,20,40 and 80 nm Channel concentration (Si P-type)  1016 cm−3 Source and Drain concentration (Si N-type) 1019 cm−3   3. RESULTS AND DISCUSSIONS  In this research, the Id–Vg characteristics of FinFET at the temperatures of 250, 275, 300, 325, 350, 375 and 400 K° are simulated with the following parameters: channel length= 85 nm, channel concentration (P-type)=1016 cm−3, source and drain lengths=50 nm, source and drain concentration (N-type)=1019 cm−3 and oxide thickness=2.5nm. The gate Fin width values are WF=5,10,20,40 and 80 nm.  Figures 3-7 show the change in ∆I when the temperature increased at the VDD range of 0–5 V with 0.25 V steps for the WF values of 5,10,20,40 and 80 nm. As shown by the figures, the maximum sensitivities (max ∆I) are at the relatively lower temperatures, and the values decreased linearly as temperature increased for all VDD. Figures 3 and 4 present the maximum temperature sensitivity values at VDD=1.25 V (WF =5 nm) and VDD=1.5 V (W=10nm); followed by Figures 5 and 6 at VDD=2 V (WF=20 nm) and VDD=3.25 V  (WF=40 nm; and finally, Figure 7 at VDD=5 V (WF=80 nm).      Figure 3. ∆I–Temperature characteristics of FinFET (WF =5 nm), VDD range of 0–5 V with 0.25 V steps     Figure 4. ∆I–Temperature characteristics of FinFET (WF =10 nm), VDD range of 0–5 V with 0.25 V steps Int J Elec & Comp Eng  ISSN: 2088-8708   Temperature characteristics of FinFET based… (Yousif Atalla) 5653   Figure 5. ∆I–Temperature characteristics of FinFET (WF =20 nm), VDD range of 0–5 V with 0.25 V steps     Figure 6. ∆I–Temperature characteristics of FinFET (WF =40 nm), VDD range of 0–5 V with 0.25 V steps     Figure 7. ∆I–Temperature characteristics of FinFET (WF =80 nm), VDD range of 0–5 V with 0.25 V steps   Figures 8-12 show the changes in ∆I with decreasing VDD at T=250, 275, 300, 325, 350, 375 and 400 K° and W=5,10,20,40 and 80 nm. The following maximum sensitivities (max ∆I) were observed: VDD=1.25 V (WF=5 nm), VDD=1.5 V (WF=10 nm), VDD=2 V (WF=20 nm), VDD=3.25 V (WF=40 nm) and VDD=5 V (WF=80 nm).                 ISSN: 2088-8708 Int J Elec & Comp Eng, Vol. 10, No. 6, December 2020 :  5650 - 5657 5654   Figure 8. ∆I–VDD characteristics of FinFET (WF=5 nm)     Figure 9. ∆I–VDD characteristics of FinFET (WF=10 nm)     Figure 10. ∆I–VDD characteristics of FinFET (WF=20 nm)     Figure 11. ∆I–VDD characteristics of FinFET (WF=40 nm) Int J Elec & Comp Eng  ISSN: 2088-8708   Temperature characteristics of FinFET based… (Yousif Atalla) 5655   Figure 12. ∆I–VDD characteristics of FinFET (WF=80 nm)   Figure 13 shows the optimum operating voltage (VDD) based on the best temperature sensitivity and channel Fin width, where optimal VDD is associated with the temperature sensitivity peaks shown in  Figures 8-12. The temperature sensitivity increased linearly with all the range of channel Fin width  (5-80 nm). So, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V).     Figure 13. Optimised operating voltage VDD with different channel Fin  width based on best temperature sensitivity   4. CONCLUSION  The effects of different temperatures (250, 275, 300, 325, 350, 375 and 400 K°) on FinFET characteristics are studied by considering different channel Fin width (WF=5,10,20,40 and 80 nm).  For the diode mode transistor connection and increments for the current (∆I), the working voltage VDD must increase with increasing the gate Fin width to get the best sensitivity, so the lower Fin width has best sensitivity with lower working voltage. The linear relation between temperature sensitivity and working voltage has been result in this study with all range of channel Fin width WF =5-20nm.   ACKNOWLEDGEMENTS  This work was supported by the Ministry of Education, Malaysia, under Fundamental Research Grant Scheme FRGS/1/2019/TK04/UMP/02/15 (Grant ID: RDU1901199).    REFERENCES  [1] G. V. Angelov, D. N. Nikolov, and M. H. Hristov, “Technology and Modeling of Nonclassical Transistor Devices,” Journal of Electrical and Computer Engineering, vol. 2019, pp. 1-18, 2019. [2] J. P. Rojas, et al., “Nonplanar Nanoscale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing,” ACS Nano, vol. 9, no. 5, pp. 5255-5263, 2015. [3] M. T. Bohr, "Logic Technology Scaling to Continue Moore's Law," IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM), pp. 1-3, 2018. [4] J. M. Shalf and R. Leland, "Computing beyond Moore's Law,” Computer, vol. 48, no. 12, pp. 14-23, 2015. [5] L. Eeckhout, "Is Moore’s Law Slowing Down? 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Sidek, “Temperature effect on IV characteristics of Si nanowire transistor,” IEEE Colloquium on Humanities, Science and Engineering (CHUSER), pp. 331-334, 2011. [21] M. Bescond, K. Nehari, J.L. Autran, N. Cavassilas, D. Munteanu, M. Lannoo, “3D quantum modeling and simulation of multiple-gate nanowire MOSFETs,” IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., San Francisco, CA, pp. 617-620, 2004. [22] H. M. Fahad, C. Hu, and M. M. Hussain, “Simulation Study of a 3-D Device Integrating FinFET and UTBFET,” IEEE Transactions On Electron Devices, vol. 62, no. 1, pp. 83-87, 2015. [23] J. Alvarado, J. C. Tinoco, S. Salas, A. G. Martinez-Lopez, B. S. Soto-Cruz, A. Cerdeira and J.-P. Raskin,  “SOI FinFET compact model for RF circuits simulation,” IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), pp. 87–89, 2013. [24] SungGeun Kim, Gerhard Klimeck, Sriraman Damodaran, and Benjamin P. Haley, "MuGFET," 2014. [Online]. Available: https://nanohub.org/resources/NANOFINFET [25] Y. Hashim, “Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor,” Journal of Nanoscience and Nanotechnology, vol. 18, no. 2, pp. 1199–1201, 2018.   BIOGRAPHIES OF AUTHORS    Yousif Atalla, the author was born at Iraq, he received the B.Sc. of Engineering in Electronics and Communications Engineering from Engineering Technical College, Iraq. He completed the M.Sc. in Electronics Engineering- Micro and Nano-electronics from Universiti Malaysia Pahang (UMP), Pahang, Malaysia. He is currently working as a Director of the Engineering Affairs Department - Salah Al-Din Governorate Council, Iraq.  His research interests include Microelectronics and Nanoelectronic: FinFET transistor.    Yasir Hashim, the author was born at Iraq, 1969, he received the B.Sc. and Master of Engineering in Electronics and Communications Engineering from the University of Mosul, Mosul, Iraq, in 1991 and 1995 respectively. He completed the Ph.D. in Electronics Engineering- Micro and Nano-electronics from Universiti Science Malaysia (USM), Penang, Malaysia, in 2013. He is currently a Senior Lecturer in the Faculty of Engineering, Tishk International University, Erbil-Kurdistan, Iraq. His research interests include Microelectronics and Nanoelectronic: Nanowire transistors, FinFET transistor, Multistage Logic Nano-inverters. The author has teaching experience in undergraduate fields of Electrical and Electronics Engineering for 17 years and supervised postgraduate student in Master and Ph.D levels.  Int J Elec & Comp Eng  ISSN: 2088-8708   Temperature characteristics of FinFET based… (Yousif Atalla) 5657   Abdul Nasir Abd. Ghafar, the author received the B.Sc. in Electrical and Electronics System Engineering, Master in Electronics System and PhD in Systems Engineering from Okayama University of Science, Japan in 2011, 2013 and 2016 respectively. He is currently a Senior Lecturer and Head of Program, Electrical Engineering Technology (Power and Machine), Faculty of Electrical and Electronics Engineering Technology, Universiti Malaysia Pahang (UMP), Malaysia. His research interest includes applied electronics, embedded system, optimization and simulation, robotics, and rehabilitation devices. The author has teaching experience in undergraduate fields of Electrical and Electronics Engineering for 5 years and supervised postgraduate students in both Master and PhD levels.     Waheb A. Jabbar received the B.Sc. in Electrical Engineering from the University of Basrah, Iraq, in 2001, the M.Eng. in Communication & Computer and the Ph.D. in Electrical, Electronics, and System Engineering from Universiti Kebangsaan Malaysia (UKM), Bangi, Selangor, Malaysia, in 2011 and 2015 respectively. He is currently a Senior Lecturer in  the Faculty of Engineering Technology, Universiti Malaysia Pahang (UMP), Gambang, Pahang, Malaysia. His research interests include Routing Protocols in Ad Hoc Networks, Mobile Communications and Wireless Networking. He also has a keen interest in Nano electronics, Internet of Things applications, and Smart City.    

Temperature characteristics of FinFET based on channel fin width and working voltage

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