Significant Improvement of SiO 2 /4H-SiC Interface Properties by Electron Cyclotron Resonance Nitrogen Plasma Irradiation

Abstract

The effect of the insertion of a SiN film on the SiO 2 /4H-SiC interface properties was studied. The SiN interlayer was grown using electron cyclotron resonance (ECR) nitrogen plasma irradiation prior to the SiO 2 deposition. It was found that the insertion of a SiN interlayer led to a significant decrease in interface-state and fixed-charge densities in a SiO 2 /4H-SiC gate stack. This insertion also induced elimination of the near-interface traps in the oxide. It was clarified from X-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectrometry analyses that Si dangling bonds were terminated by nitrogen, and the SiN interlayer effectively suppressed the formation of carbon generated by the thermal reaction between SiC and O atoms. So far, 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) have still not been realized for commercial applications because of serious degradation of channel mobility, which is mainly attributed to the unacceptably high density of interfacial traps near the conduction-band edge (E C ) of 4H-SiC. Both experiments 1-9 and recent theoretical simulations 1-3 Unfortunately, these gases simultaneously introduce oxygen; consequently, a C-containing transition layer is inevitably formed near the SiO 2 /4H-SiC interface, 3 which limits the efficiency of N 2 O or NO passivation. Thus, the typical channel mobility of the 4H-SiC n-channel MOSFET is limited to a value of approximately 40 cm 2 /Vs despite N 2 O or NO passivation. 1, 2 Obviously this value is much lower than the bulk mobility and still insufficient for practical application. An effective way to suppress the interfacial transition layer formed during oxidation is the deposition of a gate dielectric on 4H-SiC. 7 As pointed out in the report by Noborio et al., Our group has established a method for growing a SiN layer on a Si substrate using electron cyclotron resonance (ECR) nitrogen plasma irradiation. 12 This method enables us to fabricate a near-stoichiometric SiN layer, which can be expected to have the potential to passivate a surface of 4H-SiC. In this work, ECR nitrogen plasma irradiation was employed for the formation of a SiN layer on 4H-SiC. A significant improvement of SiO 2 /4H-SiC interface properties was demonstrated by the insertion of a SiN interlayer (IL). The passivation mechanism of interfacial defects by nitrogen was clarified by low-temperature capacitance-voltage (C-V) measurements, X-ray photoelectron spectroscopy (XPS) analyses, and time-of-flight secondary ion mass spectrometry (TOF-SIMS). z E-mail: [email protected] Experimental The substrate used in this study was an n-type epitaxial wafer, which consisted of a 4 • off-axis 4H-SiC (0001) film with a thickness of 3.5 μm, a donor concentration of 1 × 10 16 cm −3 and a highly doped n-type 4H-SiC substrate. Metal-oxide-semiconductor (MOS) capacitors were fabricated using the following procedures. After a standard cleaning with a final 2% HF dip, the gate dielectric on 4H-SiC was fabricated through two steps without breaking the vacuum; namely, the ECR nitrogen plasma irradiation and subsequent ECR-SiO 2 sputter deposition at room temperature. A detailed description of the ECR system is given elsewhere. 13 ECR nitrogen plasma irradiation was performed for 30 min, resulting in the growth of a SiN film with a thickness of approximately 3 nm, which was confirmed from ellipsometry measurements. Here, the microwave power for ECR plasma generation was 250 W, and the Ar and N 2 flow rates were 10 and 15 sccm, respectively, which were the same as the optimal conditions for growing near-stoichiometric SiN film on a Si substrate. 12 Subsequently, a SiO 2 film with a thickness of approximately 50 nm was deposited on SiN-grown 4H-SiC, where the microwave and radio frequency powers were 300 W, and the Ar and O 2 flow rates were 16 and 8 sccm, respectively. Then, postdeposition annealing (PDA) was done at 1200 • C for 120 min in N 2 , which is required to improve the interface quality. • C for 4 h, resulting in a thickness of approximately 50 nm. Both types of gate dielectric were also treated by the same PDA like for the sample with a SiN interlayer. Finally, Al films were evaporated and patterned to form gate electrodes with a diameter of 600 μm, and an InGa alloy was rubbed onto the backside for ohmic contact formation. The structure and composition of gate dielectrics were analyzed by XPS and TOF-SIMS, and the electrical properties of MOS capacitors were evaluated by high-frequency (HF: 1 MHz) and quasistatic (QS) C-V measurements. Results and Discussion Electrical properties of 4H-SiC MOS capacitors without and with SiN IL.